A connection terminal unit that can be appropriately connected to terminal connection portions of a semiconductor module including a semiconductor element and that can reduce a projection area when seen in a direction orthogonal to a direction along a chip surface is realized. Connection terminal unit includes plurality of connection terminals facing and connected to plurality of terminal connection portions of semiconductor module, and terminal mold portion holding connection terminals. Terminal mold portion has abutment portion that abuts against semiconductor module or base material holding semiconductor module. Abutment portion has vertical abutment portion that abuts against semiconductor module or base material from vertical direction that is a direction in which connection terminals face terminal connection portions, and side abutment portion that abuts against semiconductor module or base material from at least two directions that are different from each other and intersect with vertical direction.

A semiconductor module includes: semiconductor elements having a gate electrode, a first electrode and a second electrode; a resin mold; and conductive members connected to at least one of the semiconductor elements and having a common wiring electrode exposed from the resin mold and connected to the first electrode or the second electrode and a non-common wiring electrode exposed from the resin mold and connected to an electrode of the semiconductor element different from the common wiring electrode. A width of a common wiring connected to the common wiring electrode is wider than the non-common wiring electrode. The common wiring is arranged from one side to an opposite side on a surface of the resin mold, on which the common wiring electrode is exposed, without being electrically connected to the non-common wiring electrode.

An object is to provide a semiconductor device which suppresses poor bonding between a metal pattern and an electrode terminal due to insufficient temperature rise at the time of bonding the metal pattern and the electrode terminal. The electrode terminal is branched into a plurality of branch portions in a width direction on one end side of an extending direction thereof, of the plurality of branch portions, a first branch portion and a second branch portion are bonded on the metal pattern via a bonding material, respectively, the first branch portion has a wider width than that of the second branch portion, and the bonding material between the second branch portion and the metal pattern is thinner than the bonding material between the first branch portion and the metal pattern.

Provided is a semiconductor module including: an insulating circuit board having a circuit pattern formed in one surface; a semiconductor chip placed in the insulating circuit board; and a wiring portion for electrically connecting the semiconductor chip and the circuit pattern. The wiring portion includes a chip connecting portion connected to the semiconductor chip. A surface of the chip connecting portion includes: a plurality of concave portions; and a flat portion disposed between two concave portions.

Provided is a semiconductor module including: an insulating circuit board having a circuit pattern formed in one surface; a semiconductor chip placed in the insulating circuit board; and a wiring portion for electrically connecting the semiconductor chip and the circuit pattern. The wiring portion includes a chip connecting portion connected to the semiconductor chip. A surface of the chip connecting portion includes: a plurality of concave portions; and a flat portion disposed between two concave portions.

The power semiconductor apparatus includes: a semiconductor device 401; a bonding layer on chip 416 disposed on an upper surface of the semiconductor device; and a metal lead 419 disposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal lead 420 has a three-laminated structure including: a second metal layer 420b having a CTE equal to or less than 5×10.sup.−6/° C., for example; and a first metal layer 420a and a third metal layer 420c sandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

The power semiconductor apparatus includes: a semiconductor device 401; a bonding layer on chip 416 disposed on an upper surface of the semiconductor device; and a metal lead 419 disposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal lead 420 has a three-laminated structure including: a second metal layer 420b having a CTE equal to or less than 5×10.sup.−6/° C., for example; and a first metal layer 420a and a third metal layer 420c sandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

An electronic module comprises a sealing part 90, a rear surface-exposed conductor 10, 20, 30, a rear surface-unexposed conductor 40, 50 and a second connector 70 for electrically connecting an electronic element 15, 25 to the rear surface-unexposed conductor 40, 50. The rear surface-unexposed conductor 40, 50 is positioned on a front surface side compared with the rear surface-exposed part 12, 22, 32. The second connection tip part 72 is positioned on a rear surface side compared with the second connection base part 71. A distance H in a thickness direction between a rear surface side end part of the second connection base part 71 and a rear surface side end part of the second connection tip part 72 is larger than a width W of the second connection tip part 72 of the second connector 70.

A semiconductor device according to the present invention includes a substrate, a resin case, and a wiring member having an exposed portion adjacent to a first fixing portion fixed in a wall surface of the resin case and exposed to outside, and a second fixing portion fixed in the wall surface of the resin case at a position different from the first fixing portion with respect to a portion extending from the first fixing portion into the resin case, in which the wiring member is bonded to a surface of the semiconductor element by solder in the resin case, and has a plate shape having a length, a thickness, and a width, in which the wiring member has the thickness being uniform and is flat in the resin case, and the width of the second fixing portion is narrower than the width of the exposed portion.

A semiconductor device according to the present invention includes a substrate, a resin case, and a wiring member having an exposed portion adjacent to a first fixing portion fixed in a wall surface of the resin case and exposed to outside, and a second fixing portion fixed in the wall surface of the resin case at a position different from the first fixing portion with respect to a portion extending from the first fixing portion into the resin case, in which the wiring member is bonded to a surface of the semiconductor element by solder in the resin case, and has a plate shape having a length, a thickness, and a width, in which the wiring member has the thickness being uniform and is flat in the resin case, and the width of the second fixing portion is narrower than the width of the exposed portion.