Disclosed is a power semiconductor package including a power transistor having a first power electrode and a gate electrode on its top surface and a second power electrode on its bottom surface. The second power electrode is configured for attachment to a partially etched leadframe segment, where the partially etched leadframe segment is attached to a substrate. A conductive clip is situated over the first power electrode and extends to the substrate in order to couple the first power electrode to the substrate without using a leadframe.

In a power semiconductor device, an IGBT has a collector electrode bonded to a metal plate by a bonding material. A diode has a cathode electrode bonded to the metal plate by the bonding material. An interconnection member is bonded to an emitter electrode of the IGBT by a bonding material. The bonding material includes a bonding material and a bonding material. The bonding material is interposed between the IGBT and the interconnection member. The bonding material fills a through hole formed in the interconnection member. The bonding material reaches the bonding material and is therefore connected to the bonding material.

In accordance with an embodiment, a semiconductor component includes a support having a first device receiving structure and a second device receiving structure and a contact extension that is common to the first and second device receiving structures. The first device receiving structure includes a device receiving area and the second device receiving structure includes a drain contact area. A III-N based semiconductor chip has a drain bond pad bonded to the drain contact area and a source bond pad bonded to the contact extension and a gate bond pad bonded to an interconnect. A portion of the silicon based semiconductor chip is bonded to the support device receiving area. In accordance with another embodiment, a method for manufacturing the semiconductor component includes coupling a III-N based semiconductor chip to a portion of the support a silicon based semiconductor chip to another portion of the support.

A semiconductor component includes a support having a lead integrally formed thereto. An insulated metal substrate is mounted to a surface of the support and a semiconductor chip is mounted to the insulated metal substrate. A III-N based semiconductor chip is mounted to the insulated metal substrate, where the III-N based semiconductor chip has a gate bond pad, a drain bond pad, and a source bond pad. A silicon based semiconductor chip is mounted to the III-N based semiconductor chip. In accordance with an embodiment the silicon based semiconductor chip includes a device having a gate bond pad, a drain bond pad, and a source bond pad. The drain bond pad of the III-N based semiconductor chip may be bonded to the substrate or to a lead. In accordance with another embodiment, the silicon based semiconductor chip is a diode.