The object is to provide a technology for enabling reduction of adhesion of a bonding material to a particular electrode. A semiconductor device includes: a semiconductor element with a surface including a first electrode and a second electrode; a protective film formed on the surface of the semiconductor element and having insulating properties, the protective film exposing the first electrode and the second electrode; a metal lead electrode bonded to the first electrode exposed from the protective film; and a bonding material with which the first electrode exposed from the protective film is bonded to the metal lead electrode. The metal lead electrode includes an abutment portion being a protrusion abutting the protective film and blocking between the bonding material and the second electrode in a cross-sectional view.

Provided is a semiconductor package. The semiconductor package includes: a first die that is a monolithic type die, a driver circuit and a low-side output power device formed in the first die; a second die disposed above the first die, the second die comprising a high-side output power device; and a first connection unit disposed between the first die and the second die.

A method is disclosed of fabricating a microelectronic package comprising a substrate overlying the front face of a microelectronic element. A plurality of metal bumps project from conductive elements of the substrate towards the microelectronic element, the metal bumps having first ends extending from the conductive elements, second ends remote from the conductive elements, and lateral surfaces extending between the first and second ends. The metal bumps can be wire bonds having first and second ends attached to a same conductive pad of the substrate. A conductive matrix material contacts at least portions of the lateral surfaces of respective ones of the metal bumps and joins the metal bumps with contacts of the microelectronic element.

A clip-bonded semiconductor chip package comprises a lead frame having a pad and a lead; a semiconductor chip bonded onto the pad of the lead frame; a bonding pad on the semiconductor chip; metal bumps formed on the bonding pad; a clip having first and second portions coupled to each other wherein the first portion is bonded to the bonding pad via the metal bumps, wherein the second portion is bonded to the lead of the lead frame; and a package body made of a molding material around the lead frame, the semiconductor chip and the clip.

A clip-bonded semiconductor chip package comprises a lead frame having a pad and a lead; a semiconductor chip bonded onto the pad of the lead frame; a bonding pad on the semiconductor chip; metal bumps formed on the bonding pad; a clip having first and second portions coupled to each other wherein the first portion is bonded to the bonding pad via the metal bumps, wherein the second portion is bonded to the lead of the lead frame; and a package body made of a molding material around the lead frame, the semiconductor chip and the clip.

A semiconductor device, including an electrically conductive portion, and a terminal. The terminal includes a bonding portion that is of a flat plate shape and has: a rear surface bonded to the electrically conductive portion, and a front surface having an indentation formed thereon. The front surface has two opposite sides that are respectively a bonding front-end side and a bonding rear-end side. The indentation has two opposite sides that are respectively an indentation front-end side and an indentation rear-end side. The indentation front-end side is flush with the bonding front-end side. A length of the indentation rear-end side is shorter than a length of the bonding rear-end side.

Provided is a semiconductor package. The semiconductor package includes: a first die that is a monolithic type die, a driver circuit and a low-side output power device formed in the first die; a second die disposed above the first die, the second die comprising a high-side output power device; and a first connection unit disposed between the first die and the second die.

To provide a semiconductor module that has high reliability of electric connection by a solder and is inexpensive. A joint surface of an electrode jointing portion that is opposed to a surface to be jointed of a gate electrode of a bare-chip FET and a joint surface of a substrate jointing portion that is opposed to a surface to be jointed of another wiring pattern include an outgas releasing mechanism that makes outgas generated from a molten solder during solder jointing of a metal plate connector be released from solders interposed between the joint surfaces and the surfaces to be jointed.

To provide a semiconductor module that has high reliability of electric connection by a solder and is inexpensive. A joint surface of an electrode jointing portion that is opposed to a surface to be jointed of a gate electrode of a bare-chip FET and a joint surface of a substrate jointing portion that is opposed to a surface to be jointed of another wiring pattern include an outgas releasing mechanism that makes outgas generated from a molten solder during solder jointing of a metal plate connector be released from solders interposed between the joint surfaces and the surfaces to be jointed.

To provide a semiconductor module capable of shortening of the manufacturing tact time, reducing the manufacturing costs, and improving assembility. A semiconductor module (30) includes substrate (31) made of metal, an insulating layer (32) formed on the substrate (31), a plurality of wiring patterns (33a to 33d) formed on the insulating layer (32), a bare-chip transistor (35) mounted on a wiring pattern (33a) via a solder (34a); and a metal plate connector (36a, 36b) jointing an electrode (S, G) of the bare-chip transistor (35) and a wiring pattern (33b, 33c) via a solder (34b, 34c). The metal plate connector (36a, 36b) has a bridge shape, and has a flat surface and a center of gravity at a middle portion of the component.