A semiconductor package with embedded electromagnetic field (EMF) shielding protection using wire bonding is provided. The semiconductor may comprise a plurality of shield wires and signal wires. The shield wires may surround all of a portion of a die to shield the die from EMF. The shield wires and the signal wires may be formed from portions of wire bonds. In manufacturing the semiconductor package these wire bonds may be created connecting to the base and/or the die. The wire bonds may then be broken to form the shield wires and signal wires. These wires may be connected to a ground plane and/or signals pads, which are separated by a dielectric material.

A process of forming an electronic device includes providing a wire comprising a first ball at an end thereof, operating on the first ball to modify a surface of the first ball to form a modified surface, moving the first ball to a first location on a die, and bonding the first ball along the modified surface to the first location of the die. In an embodiment, the process further includes moving a bonding tool including the wire away from the die while the wire remains bonded to the die.

A process for manufacturing a bonding wire containing a core having a surface. The core contains 98.0% copper and has a cross sectional area of 75,00 to 600,000 m.sup.2 and an elastic limit RP0.2 (yield strength) of 40 to 95 N/mm.sup.2. The process involves (a) providing a copper core precursor; (b) drawing the precursor until a final diameter of the wire core is reached; and (c) annealing the drawn wire at a minimum annealing temperature of 650 to 1000 C. through its entire cross section for a minimum annealing time of 4 seconds to 2 hours.

A process of forming an electronic device includes providing a wire comprising a first ball at an end thereof, operating on the first ball to modify a surface of the first ball to form a modified surface, moving the first ball to a first location on a die, and bonding the first ball along the modified surface to the first location of the die. In an embodiment, the process further includes moving a bonding tool including the wire away from the die while the wire remains bonded to the die. In another embodiment,

Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a package substrate, a redistribution layer on the package substrate, a vertical connection terminals that connects the package substrate to the redistribution layer, a first semiconductor chip between the package substrate and the redistribution layer, a first molding layer that fills a space between the package substrate and the redistribution layer, a second semiconductor chip on the redistribution layer, a third semiconductor chip on the second semiconductor chip, a first connection wire that directly and vertically connects the redistribution layer to a first chip pad of the third semiconductor chip, the first chip pad is beside the second semiconductor chip and on a bottom surface of the third semiconductor chip, and a second molding layer on the redistribution layer and covering the second semiconductor chip and the third semiconductor chip.