In examples, an electronic device comprises a printed circuit board (PCB), an orifice extending through the PCB, and a semiconductor die suspended above the orifice by aluminum bond wires. The semiconductor die is vertically aligned with the orifice and the bond wires coupled to the PCB.

A semiconductor unit includes a plurality of semiconductor chips, and an insulated circuit board including an insulating plate having, in a plan view of the semiconductor unit, a rectangular shape surrounded by first and second sides opposite to each other and third and fourth sides perpendicular to the first and second sides and opposite to each other, an output circuit pattern and an input circuit pattern on a front surface of the insulating plate. The output and input circuit patterns each extend from the third side to the fourth side, and disposed in this order side by side in a main current direction that is a direction from the first side toward the second side. The plurality of semiconductor chips are bonded to the input circuit pattern at an area extending from the third side to the fourth side and including a center of the third and fourth sides.

A semiconductor package includes a substrate extending in a first direction and a second direction perpendicular to the first direction, a first semiconductor chip disposed on the substrate, the first semiconductor chip having a stepped portion, a second semiconductor chip disposed on the substrate and horizontally spaced apart from the first semiconductor chip in the first direction, a third semiconductor chip disposed on the second semiconductor chip and a bottom surface of the stepped portion, and an upper adhesive layer disposed between the second semiconductor chip and the third semiconductor chip, the upper adhesive layer contacting a portion of the bottom surface of the stepped portion.

To protect memory cards, such as SD type cards, and similar devices from Electrostatic Discharge (ESD), the input pads of the device include points along their edges that are aligned with correspond points on a conductive frame structure mounted adjacent the input pad to form a spark gap. The input pads are connected to a memory controller or other ASIC over signal lines that include a diode located between the input pad and the ASIC and a resistance located between the input pad and the diode. The resistance and diode are selected such that an ESD event at an input pad triggers a discharge across the spark gap before it is transmitted on to the ASIC, while also allowing a high data rate for signals along the signal line.

To protect memory cards, such as SD type cards, and similar devices from Electrostatic Discharge (ESD), the input pads of the device include points along their edges that are aligned with correspond points on a conductive frame structure mounted adjacent the input pad to form a spark gap. The input pads are connected to a memory controller or other ASIC over signal lines that include a diode located between the input pad and the ASIC and a resistance located between the input pad and the diode. The resistance and diode are selected such that an ESD event at an input pad triggers a discharge across the spark gap before it is transmitted on to the ASIC, while also allowing a high data rate for signals along the signal line.

Stacked semiconductor devices and associated systems and methods are disclosed herein. In some embodiments, the semiconductor device can include a package substrate and a stack of semiconductor dies carried by the package substrate. The stack of semiconductor dies includes a first die carried by the package substrate and a second die carried by the first die. The semiconductor device also includes an interconnect module carried by the package substrate adjacent the stack of semiconductor dies. The interconnect module includes a first end coupled the package substrate, a second end opposite the first end, a conductive via extending through a body of organic material from the first end to the second end. The first semiconductor die can is electrically coupled directly to the package substrate, while the second semiconductor die is electrically coupled to the package substrate through the second end of the interconnect module.

Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a package substrate, a redistribution layer on the package substrate, a vertical connection terminals that connects the package substrate to the redistribution layer, a first semiconductor chip between the package substrate and the redistribution layer, a first molding layer that fills a space between the package substrate and the redistribution layer, a second semiconductor chip on the redistribution layer, a third semiconductor chip on the second semiconductor chip, a first connection wire that directly and vertically connects the redistribution layer to a first chip pad of the third semiconductor chip, the first chip pad is beside the second semiconductor chip and on a bottom surface of the third semiconductor chip, and a second molding layer on the redistribution layer and covering the second semiconductor chip and the third semiconductor chip.

A semiconductor package includes: a substrate including a first bonding pad and a first conductive pattern positioned at the same level and in contact with the first bonding pad; a lower semiconductor chip and an upper semiconductor chip stacked over the substrate, the lower and upper semiconductor chips respectively including a first lower chip pad and a first upper chip pad; a first lower bonding wire with first and second ends respectively connected to the first bonding pad and the first lower chip pad; and a first upper bonding wire with a first end connected to the first bonding pad and a second end connected to the first upper chip pad, the first end of the first upper bonding wire is located farther from the lower and upper semiconductor chips and closer to the first conductive pattern than the first end of the first lower bonding wire.

A semiconductor device includes a rigid flex circuit that has a first rigid region and a second rigid region that are electrically connected by a flexible portion. A first die is mounted to a first side of the first rigid region. A second die is mounted to a second side of the second rigid region. The first and second sides are on opposite sides of the rigid flex circuit. The flexible portion is bent to hold the first and second rigid regions in generally vertical alignment with each other.

A semiconductor package includes: a substrate including a first bonding pad and a first conductive pattern positioned at the same level and in contact with the first bonding pad; a lower semiconductor chip and an upper semiconductor chip stacked over the substrate, the lower and upper semiconductor chips respectively including a first lower chip pad and a first upper chip pad; a first lower bonding wire with first and second ends respectively connected to the first bonding pad and the first lower chip pad; and a first upper bonding wire with a first end connected to the first bonding pad and a second end connected to the first upper chip pad, the first end of the first upper bonding wire is located farther from the lower and upper semiconductor chips and closer to the first conductive pattern than the first end of the first lower bonding wire.