A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires.

A semiconductor device includes a substrate; an electronic component disposed on the substrate; a bonding wire comprising a first terminal connected to the electronic component and a second terminal connected to the substrate; and a supporter disposed between the first terminal and the second terminal of the bonding wire.

In a manufacturing method of a semiconductor device including a substrate having a front surface and a rear surface, and a film attached to the rear surface, the film is attached on the rear surface, a rear surface side groove is provided by half-cutting the substrate from the rear surface together with the film, a protective member is attached to the film after the rear surface side groove is provided, and a front surface side groove connected to the rear surface side groove is provided by dicing the substrate from the front surface after the protective member is attached.

A semiconductor device includes a ground plane, a capacitor disposed on the ground plane and having a first top surface, a semiconductor chip disposed on the ground plane and having a second top surface, a bonding wire connecting the first top surface and the second top surface, and a conductive member disposed on the ground plane. The conductive member is electrically connected to the ground plane. The bonding wire extends in a first direction in a planar view normal to the ground plane. The conductive member is positioned apart from the bonding wire in a second direction orthogonally intersecting in the planar view with the first direction.

A semiconductor device includes a semiconductor chip having an electrode pad, a terminal having a terminal pad, and a bonding wire. The bonding wire includes a first end portion, a first bonded portion bonded to the electrode pad, a loop portion extending between the semiconductor chip and the terminal, and a second bonded portion bonded to the terminal pad. The second bonded portion is a wedge bonded portion comprising a second end portion of the bonding wire opposite to the first end portion. A length of the first bonded portion in the first direction is greater than a length of the second bonded portion in the first direction.

A device includes: a surface mount device carrier configured to be mounted to a metal submount of a transistor package, said surface mount device carrier includes an insulating substrate includes a top surface and a bottom surface and a first pad and a second pad arranged on a top surface of said surface mount device carrier; at least one surface mount device includes a first terminal and a second terminal, said first terminal of said surface mount device mounted to said first pad and said second terminal mounted to said second pad; and at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by said insulating substrate, where at least one of the first pad and the second pad are configured as wire bond pads.

An RF transistor package includes a metal submount; a transistor die mounted to the metal submount; and a surface mount IPD component mounted to the metal submount. The surface mount IPD component includes a dielectric substrate that includes a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of the surface mount IPD component; at least one surface mount device includes a first terminal and a second terminal, the first terminal of the surface mount device mounted to the first pad and the second terminal mounted to the second pad; at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by the dielectric substrate; and at least one wire bond bonded to the at least one of the first pad and the second pad.

A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires.

A semiconductor module includes: a first metal plate including a first mount part joined with a bottom-surface electrode of a first switching element, a second mount part joined with a positive-electrode terminal, and a first narrow part between the first and second mount parts and being narrower than a part jointing the first switching element to the first mount part and the positive-electrode terminal; a second metal plate being joined with a bottom-surface electrode of a second switching element, and connected to a top-surface electrode of the first switching element; a third metal plate including a sixth mount part joined with a negative-electrode terminal, a seventh mount part connected to a top-surface electrode of the second switching element, and being narrower than the negative-electrode terminal, and a second narrow part between the sixth and seventh mount parts; and a snubber circuit connecting the first and second narrow parts.

A power module includes a plurality of conductive wire groups and a sealing member. The plurality of conductive wire groups each include a first bonded portion and a second bonded portion. A maximum gap between intermediate portions of a pair of conductive wire groups adjacent to each other is larger than a first gap between the first bonded portions of the pair of conductive wire groups adjacent to each other. The maximum gap between the intermediate portions of the pair of conductive wire groups adjacent to each other is larger than a second gap between the second bonded portions of the pair of conductive wire groups adjacent to each other. Therefore, the power module is improved in reliability.