A semiconductor device of the present invention includes a semiconductor layer including a main IGBT cell and a sense IGBT cell connected in parallel to each other, a first resistance portion having a first resistance value formed using a gate wiring portion of the sense IGBT cell and a second resistance portion having a second resistance value higher than the first resistance value, a gate wiring electrically connected through mutually different channels to the first resistance portion and the second resistance portion, a first diode provided between the gate wiring and the first resistance portion, a second diode provided between the gate wiring and the second resistance portion in a manner oriented reversely to the first diode, an emitter electrode disposed on the semiconductor layer, electrically connected to an emitter of the main IGBT cell, and a sense emitter electrode disposed on the semiconductor layer, electrically connected to an emitter of the sense IGBT cell.

In a circuit substrate, a plurality of first microstrip lines connect outputs of a plurality of circuit patterns containing a parallel capacitor to a plurality of first output pads respectively. A plurality of second wires connect the first output pads of the circuit substrate to inputs of a plurality of transistor cells of a semiconductor substrate respectively. The numbers of the fingers of the transistor cells are the same. The first microstrip lines connected to the circuit patterns disposed on both sides of the lining-up circuit patterns are longer than the other first microstrip lines.

Reliability of a semiconductor device is improved. A wire bonding step includes a step of exposing a wire and a pad electrode to a reducing gas atmosphere, forming a first hydroxyl layer on a surface of a ball portion, and forming a second hydroxyl layer on a surface of the pad electrode, a first bonding step of temporarily joining the ball portion to the pad electrode through the first hydroxyl layer and the second hydroxyl layer, and after the first bonding step, a step of actually joining the ball portion to the pad electrode by performing a heat treatment on a semiconductor chip and a base material.

A method of forming and transferring shaped metallic interconnects, comprising providing a donor substrate comprising an array of metallic interconnects, using a laser system to prepare the metallic interconnects, forming shaped metallic interconnects, and transferring the shaped metallic interconnect to an electrical device. An electronic device made from the method of providing a donor ribbon, wherein the donor ribbon comprises an array of metal structures and a release layer on a donor substrate, providing a stencil to the metal structures on the donor substrate, applying a laser pulse through the donor substrate to the metal structures, and directing the metal structures to an electronic device.

A semiconductor device has an interposer frame mounted over a carrier. A semiconductor die has an active surface and bumps formed over the active surface. The semiconductor die can be mounted within a die opening of the interposer frame or over the interposer frame. Stacked semiconductor die can also be mounted within the die opening of the interposer frame or over the interposer frame. Bond wires or bumps are formed between the semiconductor die and interposer frame. An encapsulant is deposited over the interposer frame and semiconductor die. An interconnect structure is formed over the encapsulant and bumps of the first semiconductor die. An electronic component, such as a discrete passive device, semiconductor die, or stacked semiconductor die, is mounted over the semiconductor die and interposer frame. The electronic component has an I/O count less than an I/O count of the semiconductor die.

This invention enhances reliability of an electrical test. A semiconductor device manufacturing method in which a potential (first potential) is supplied by bringing a plurality of first and second test terminals into contact with a plurality of leads, respectively in the step of supplying the potential to the leads (first leads) to carry out the electrical test. The first test terminals come into contact with the leads, individually, and the second test terminals come into contact with the leads in one batch.

A semiconductor arrangement includes a substrate, a semiconductor element connected to the substrate and including on a side remote from the substrate a contact surface which is connected to the substrate via a first bond connecting means such that as to form on the contact surface a stitch contact arranged between a first loop and a second loop of the first bond connecting means. The first loop has a first maximum and the second loop has a second maximum. A second bond connecting means has a first transverse arranged to run above the first stitch contact and, viewed running parallel to the contact surface, between the first maximum of the first loop and the second maximum of the second loop. The first transverse loop of the second bond connecting means is arranged to run below the first maximum of the first loop and/or the second maximum of the second loop.

In a circuit substrate, a plurality of first microstrip lines connect outputs of a plurality of circuit patterns containing a parallel capacitor to a plurality of first output pads respectively. A plurality of second wires connect the first output pads of the circuit substrate to inputs of a plurality of transistor cells of a semiconductor substrate respectively. The numbers of the fingers of the transistor cells are the same. The first microstrip lines connected to the circuit patterns disposed on both sides of the lining-up circuit patterns are longer than the other first microstrip lines.

Reliability of a semiconductor device is improved.

A wire bonding step includes a step of exposing a wire and a pad electrode to a reducing gas atmosphere, forming a first hydroxyl layer on a surface of a ball portion, and forming a second hydroxyl layer on a surface of the pad electrode, a first bonding step of temporarily joining the ball portion to the pad electrode through the first hydroxyl layer and the second hydroxyl layer, and after the first bonding step, a step of actually joining the ball portion to the pad electrode by performing a heat treatment on a semiconductor chip and a base material.

In a resin structure including a resin molded body and a plurality of electronic components embedded in the resin molded body, (i) the resin molded body has a plurality of exposed surfaces on which electrodes of the plurality of electronic components are exposed, (ii) the resin molded body has a recess formed therein, and (iii) the recess has a bottom surface which is at least one of the plurality of exposed surfaces.