A packaged semiconductor device includes a metal substrate having a first and second through-hole aperture having an outer ring, and metal pads around the apertures on dielectric pads. A first and second semiconductor die have a back side metal (BSM) layer on its bottom side are mounted top side up on a top portion of the apertures. A metal die attach layer is directly between the BSM layer and walls of the metal substrate bounding the apertures to provide a die attachment for the first and the second semiconductor die that fills a bottom portion of the apertures. Leads contact the metal pads, wherein the leads include a distal portion that extends beyond the metal substrate. Bondwires are between the metal pads and bond pads on the first and second semiconductor die, and a mold compound provides encapsulation for the packaged semiconductor device.

The present invention addresses the problem of enlarging a sensing area in an ultrasonic probe so as to achieve a higher definition. This ultrasonic diagnostic equipment is provided with an ultrasonic probe that comprises: a CMUT chip (2a) that has drive electrodes (3e)-(3j), etc., arranged in a grid-like configuration on a rectangular CMUT element section (21); and a CMUT chip (2b) that has drive electrodes (3p)-(3u), etc., arranged in a grid-like configuration on the rectangular CMUT element section (21), that is adjacent to the CMUT chip (2a), and in which the drive electrodes (3e)-(3j) of the adjacent CMUT chip (2a) are electrically connected to the respective drive electrodes (3p)-(3u) via bonding wires (4f)-(4i), etc.

A semiconductor package includes a package substrate, at least one first semiconductor chip on the package substrate and having a first height as measured from the package substrate, at least one second semiconductor chip on the package substrate spaced apart from the first semiconductor chip and having a second height less than the first height as measured from the package substrate, at least one third semiconductor chip stacked on the first and second semiconductor chips, and at least one support structure between the at least one second semiconductor chip and the at least one third semiconductor chip configured to support the at least one third semiconductor chip.

An LED filament and an LED light bulb applying the same are provided. The LED filament includes a conductive section including a conductor; two or more LED sections connected to each other by the conductive section, and each of the LED sections includes two or more LED chips electrically connected to each other through a wire; two electrodes, electrically connected to the LED section; and a light conversion layer with a top layer and a base layer, covering the LED sections, the conductive section and the two electrodes, and a part of each of the two electrodes is exposed respectively. The LED filament is supplied with electric power no more than 8 W, when the LED filament is lit, at least 4 lm of white light is emitted per millimeter of filament length.

Described is a packaged component having a first surface and an opposite second surface. The packaged component may comprise a first element a second element, and a third element. The first element may have a first surface and an opposite second surface. The second element may have a first surface and an opposite second surface. The third element may electrically connect a portion of the first element to a portion of the second element. The second surface of the first element may be adjacent to the second surface of the packaged component, and the second surface of the second element may be adjacent to the second surface of the packaged component.

An electronic module includes a semiconductor package having a die pad, a semiconductor die, and an encapsulant. The encapsulant has a first main face and a second main face opposite to the first main face. The die pad has a first main face and a second main face opposite to the first main face. The semiconductor die is disposed on the second main face of the die pad. An insulation layer is disposed on at least a portion of the first main face of the encapsulant and on the first main face of the die pad. The insulation layer is electrically insulating and thermally conducting. A heatsink is disposed on or in the insulation layer.

An apparatus includes a first die attach pad and a second die attach pad. A first die is attached to the first die attach pad and a second die is attached to the second die attach pad. The first die attach pad and the second die attach pad are separated by a gap. A first edge of the first die attach pad adjacent to the gap is thinner than a second edge of the first die attach pad. The first edge of the first die attach pad is opposite the second edge of the first die attach pad. A first edge of the second die attach pad adjacent to the gap is thinner than a second edge of the second die attach pad. The first edge of the second die attach pad is opposite the second edge of the second die attach pad.

A microelectronic device, in a fan-out chip scale package, has a die and an encapsulation material at least partially surrounding the die. The microelectronic device includes bump bond pads adjacent to the die that are exposed by the encapsulation material, the bump bond pads being free of photolithographically-defined structures. Wire bonds connect the die to the bump bond pads. The microelectronic device is formed by mounting the die on a carrier, and forming the bump bond pads adjacent to the die without using a photolithographic process. Wire bonds are formed between the die and the bump bond pads. The die, the wire bonds, and the bump bond pads are covered with an encapsulation material, and the carrier is subsequently removed, exposing the bump bond pads.

A semiconductor device includes a case enclosing a region where a semiconductor element as a component of an electric circuit exists. A resin part is fixed to an inside of the case in contact with the region. The resin part is provided with a conductive film, which is a part of the electric circuit. The conductive film is provided in the resin part so that the conductive film comes into contact with the region.

An optical component configured to be mounted on a circuit board has a casing made of a ceramic electrical insulator and having a cavity, a photonic circuit device provided in the cavity, a lid configured to cover the cavity, and protruding electrodes provided along an outer periphery of the cavity of the casing, wherein a first linear expansion coefficient of the casing is smaller than a second linear expansion coefficient of the circuit board, and a third linear expansion coefficient of the lid is greater than the second linear expansion coefficient of the circuit board.