Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

A semiconductor device includes a semiconductor element, a plurality of leads electrically connected to the semiconductor element and one of which supports the semiconductor element, a sealing resin covering the semiconductor element and a portion of each leads, and first and second plating layers exposed from the sealing resin. The sealing resin includes a resin side surface facing in a first direction perpendicular to the thickness direction. At least one of the leads has a lead end surface connected to its back surface and flush with the resin side surface. The first plating layer covers the back surface of the lead. The second plating layer covers the lead end surface and projects in the first direction relative to the resin side surface. An edge of the second plating layer overlaps with the first plating layer as viewed in the first direction.

Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

A leadframe comprising a plurality of leads, each of the plurality of leads having a proximal end and a distal end opposite the proximal end, the distal ends positioned along a linear axis. The leadframe further comprises a die pad closer to the proximal ends than the distal ends of the plurality of leads and including an edge positioned along a plane that intersects the linear axis at an angle less than 90 degrees.

A semiconductor device, includes: first semiconductor element including first and second electrodes; second semiconductor element including third and fourth electrodes; sealing resin covering the semiconductor elements; first, second, third, and fourth terminal portions respectively connected to the first, second, third, and fourth electrodes and exposed from the sealing resin; first island portion where the first semiconductor element is mounted; and second island portion where the second semiconductor element is mounted, wherein four quadrants divided by first imaginary line extending along second direction orthogonal to first direction and second imaginary line extending along third direction orthogonal to both the first and second directions are defined.

A semiconductor device is provided to reduce thermal fatigue in a junction portion of an external wiring to enhance long-term reliability, where the semiconductor device includes a semiconductor substrate, a transistor portion and a diode portion that are alternately arranged along a first direction parallel to a front surface of the semiconductor substrate inside the semiconductor substrate, a surface electrode that is provided above the transistor portion and the diode portion and that is electrically connected to the transistor portion and the diode portion, an external wiring that is joined to the surface electrode and that has a contact width with the surface electrode in the first direction, the contact width being larger than at least one of a width of the transistor portion in the first direction and a width of the diode portion in the first direction.

Semiconductor device packages may include a die-attach pad and a semiconductor die supported above the die-attach pad. A spacer comprising an electrically conductive material may be supported above the semiconductor die or between the semiconductor die and the die-attach pad. A wire bond may extend from a bond pad on an active surface of the semiconductor die to the spacer. Another wire bond may extend from the spacer to a lead finger or the die-attach pad. An encapsulant material may encapsulate the semiconductor die, the spacer, the wire bond, the other wire bond, the die-attach pad, and a portion of any lead fingers.

Various embodiments of an integrated circuit module and a method of forming such module are disclosed. The module includes a first die having an active substrate, an integrated circuit disposed on a first major surface of the active substrate, and a cavity disposed in a second major surface of the active substrate. The module also includes a second die having a first major surface, a second major surface, and a conductive pad disposed on the second major surface. The second die is disposed at least partially within the cavity of the first die such that the first major surface of the second die faces the cavity of the first die.

A semiconductor device provided according to an aspect of the present disclosure includes a semiconductor element, a bonding target, a first wire, a wire strip and a second wire. The bonding target is electrically connected to the semiconductor element. The first wire is made of a first metal. The first wire includes a first bonding portion bonded to the bonding target and a first line portion extending from the first bonding portion. The wire strip is made of the first metal. The wire strip is bonded to the bonding target. The second wire is made of a second metal different from the first metal. The second wire includes a second bonding portion bonded to the bonding target via the wire strip and a second line portion extending from the second bonding portion.