H01L2224/48111

PACKAGE WITH ELECTRICALLY INSULATED CARRIER AND AT LEAST ONE STEP ON ENCAPSULANT

A package is disclosed. In one example, the package includes a first main face for mounting a heat sink and an opposing second main face for being mounted on a mounting base. The package comprises a carrier, an electronic component mounted at the carrier, and an encapsulant encapsulating at least part of the electronic component and at least part of the carrier. Electrically insulating material covers electrically conductive material of the carrier at said first main face. The encapsulant comprises at least one step at the first main face.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
20230260952 · 2023-08-17 · ·

A semiconductor device capable of securing an insulation distance between a semiconductor element and a wiring. The semiconductor device includes a first semiconductor element, a second semiconductor element, a first wiring, and a second wiring. The first semiconductor element includes a first main surface and a second main surface. An electrode is formed on the first main surface. The second semiconductor element is disposed at a position different from a position of the first semiconductor element in a thickness direction. The first wiring includes an end connected to the electrode. The end includes an upper surface and a cut surface. Diameter of the second wiring is smaller than diameter of the first wiring. The second wiring includes a first end and a second end. The first end is directly connected to the upper surface of the end of the first wiring.

Semiconductor package with connection lug

A semiconductor package includes a first die pad, a first semiconductor die mounted on the first die pad, an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die, a plurality of package leads that each protrude out of a first outer face of the encapsulant body, a connection lug that protrudes out of a second outer face of the encapsulant body, the second outer face being opposite from the first outer face. The first semiconductor die includes first and second voltage blocking terminals. The connection lug is electrically connected to one of the first and second voltage blocking terminals of the first semiconductor die. A first one of the package leads is electrically connected to an opposite one of the first and second voltage blocking terminals of the first semiconductor die that the first connection lug is electrically connected to.

SEMICONDUCTOR DEVICE

A semiconductor includes: a substrate; a circuit pattern on the substrate, and including a first region, a second region located away from the first region, and a third region between the first region and the second region; a first chip disposed in the second region and including a diode; a second chip disposed in the third region, the second chip including a vertical transistor having a source pad disposed on a surface opposite to a surface facing the third region in a thickness direction of the substrate, and a gate pad disposed at a position different from the source pad; a first wire including a first bonded portion bonded to the first region, a second bonded portion bonded to the second chip, and a third bonded portion bonded to the first chip; and a second wire arranged to be adjacent to the first wire with the gate pad sandwiched therebetween.

Electronic component package

An electronic component package has an outer edge including a first side and a second side adjacent to each other. The electronic component package includes a first electronic component chip, a second electronic component chip provided at a distance from the first electronic component chip, one or more first terminals disposed along the first side, one or more second terminals disposed along the second side, and one or more first conductors. The one or more first conductors couple the one or more first terminals to the first electronic component chip, with the one or more first terminals being uncoupled to the second electronic component chip.

PACKAGED LEDS WITH PHOSPHOR FILMS, AND ASSOCIATED SYSTEMS AND METHODS
20210359173 · 2021-11-18 ·

Packaged LEDs with phosphor films, and associated systems and methods are disclosed. A system in accordance with a particular embodiment of the disclosure includes a support member having a support member bond site, an LED carried by the support member and having an LED bond site, and a wire bond electrically connected between the support member bond site and the LED bond site. The system can further include a phosphor film carried by the LED and the support member, the phosphor film being positioned to receive light from the LED at a first wavelength and emit light at a second wavelength different than the first. The phosphor film can be positioned in direct contact with the wire bond at the LED bond site.

Assembly comprising an electric component
11177628 · 2021-11-16 · ·

A surface-mountable electrical device, an assembly including the surface-mountable electrical device, and a method for producing the surface-mountable electrical device is provided. The surface-mountable electrical device includes at least one electrical component which is a semiconductor component and which is intended for generating radiation, a control circuit for pulsed operation of the component, and a capacitor which is connected to the component electrically in series and which is configured for the pulsed energization of the component. The surface-mountable electrical device further includes a lead frame assembly having a plurality of different lead frames as a mounting platform for the component, the capacitor and the control circuit, wherein at least one of the different lead frames of the lead frame assembly is thinner than a further lead frame of the different lead frames and the lead frame assembly lies only partially in a mounting side of the device.

ELECTRONIC COMPONENT PACKAGE
20230326839 · 2023-10-12 · ·

An electronic component package has an outer edge including a first side and a second side adjacent to each other. The electronic component package includes a first electronic component chip, a second electronic component chip provided at a distance from the first electronic component chip, one or more first terminals disposed along the first side, one or more second terminals disposed along the second side, and one or more first conductors. The one or more first conductors couple the one or more first terminals to the first electronic component chip, with the one or more first terminals being uncoupled to the second electronic component chip.

Semiconductor device

A semiconductor device includes: an insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member disposed on the insulating substrate, and including a first opposing portion and a second opposing portion located opposite each other with respect to the first semiconductor element in plan view; a first wire connected to the first semiconductor element and the first opposing portion; and a second wire connected to the first semiconductor element and the second opposing portion, and located opposite the first wire with respect to a connection point where the first wire and the first semiconductor element are connected to each other in plan view.

Semiconductor device using wires and stacked semiconductor package
11164833 · 2021-11-02 · ·

Disclosed are a semiconductor device and a stacked semiconductor package. The semiconductor device may include a semiconductor chip and a plurality of chip pads disposed on the semiconductor chip in a second horizontal direction perpendicular to a first horizontal direction. The plurality of chip pads may include: a first chip pad connected to a wire extending in the first horizontal direction, when seen from the top; and a second chip pad connected to a diagonal wire extending in a direction at an angle to the first and second horizontal directions, when seen from the top. The width of the first chip pad in the second horizontal direction may be smaller than the width of the second chip pad in the second horizontal direction.