Patent classifications
H01L2224/4813
SEMICONDUCTOR DEVICE, POWER CONVERTER, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a first circuit, a second circuit, a wiring member, and a bonding material. The wiring member is connected to one of the first circuit and the second circuit. The bonding material is connected to the other of the first circuit and the second circuit. The wiring member includes a first end, a second end, and a top. The first end and the second end are connected to one of the first circuit and the second circuit. The top is located between the first end and the second end. The top is connected to the other of the first circuit and the second circuit with the bonding material in between.
SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor chip includes a first electrode connected to a gate of a power device, a second electrode connected to an emitter or a source of the power device, a third electrode, and a gate protection element. The gate protection element includes a first node and a second node, and a plurality of stages of p-n junctions formed between the first node and the second node. When one of the first electrode and the second electrode is a target electrode and the other is a non-target electrode, and the first node is connected to the third electrode and the second node is connected to the target electrode. Then, the first electrode, the second electrode, the third electrode and the gate protection element are formed in the same semiconductor chip.
SEMICONDUCTOR PACKAGES
Disclosed is a semiconductor package comprising a first semiconductor chip on a substrate, a second semiconductor chip between the substrate and the first semiconductor chip, and a spacer between the substrate and the first semiconductor chip. The substrate includes a first substrate pad between the second semiconductor chip and the spacer. The second semiconductor chip includes a chip pad and a signal wire. The spacer includes a first dummy pad on the spacer and a first dummy wire coupled to the first dummy pad. The first dummy pad is adjacent to the second semiconductor chip. The first semiconductor chip is attached to the second semiconductor chip and the spacer by an adhesive layer on the first semiconductor chip. A portion of each of the signal wire and the first dummy wire are in the adhesive layer.
Semiconductor Device with Tunable Antenna Using Wire Bonds
A semiconductor device, or semiconductor device package, that includes a substrate having an antenna structure on a surface of the substrate and a wire bond that electrically connects the antenna structure to the substrate to form an antenna or a first antenna configuration. The substrate may include a second antenna structure with the wire bond connected to the second antenna structure forming a second antenna or antenna configuration. The semiconductor device may include a radio communication device electrically connected to the substrate. The antenna or antenna configuration may be tuned to the requirements of the radio communication device. The antenna configuration may be tuned by connected to different antenna structures on the surface of the substrate. The antenna configuration may be tuned by changing a length of the wire bond, changing a diameter of the wire bond, and/or changing the material of the wire bond.
CIRCUIT STRUCTURE
A circuit structure including a pad assembly, a bonding pad assembly, and a bonding assembly is provided. The pad assembly includes a first pad, a second pad, and a third pad which are separated from one another. The bonding pad assembly is located on one side of the pad assembly and includes a first bonding pad. The bonding assembly includes a first bonding wire, a second bonding wire, and a plurality of bonding members. The first bonding wire is connected to the first bonding pad and the first pad. The second bonding wire is connected to the first bonding pad and the third pad. The bonding members are connected among the first pad, the second pad, and the third pad. The circuit structure provided here may have an improved wire bonding efficiency and an increased distribution density of bonding points, and the number of bonding wires may be reduced.
Liquid detection in a sensor environment and remedial action thereof
A device includes a housing unit with an internal volume. The device further includes a sensor coupled to a substrate via an electrical coupling, wherein the sensor is disposed within the internal volume of the housing unit, and wherein the sensor is in communication with an external environment of the housing unit from a side other than a side associated with the substrate. The device also includes a moisture detection unit electrically coupled to the sensor, wherein the moisture detection unit comprises at least two looped wires at different heights, and wherein the moisture detection unit is configured to detect presence of a moisture within an interior environment of the housing unit when the moisture detection unit becomes in direct contact with the moisture.
Semiconductor packages, and methods for forming semiconductor packages
A semiconductor package includes a first semiconductor die, a semiconductor device comprising a second semiconductor die, and one or more wire bond structures. The wire bond structure includes a bond interface portion. The wire bond structure is arranged next to the first semiconductor die. The first semiconductor die and the bond interface portion of the wire bond structure are arranged at the same side of the semiconductor device. An interface contact structure of the semiconductor device is electrically connected to the wire bond structure.
Ex-situ manufacture of metal micro-wires and FIB placement in IC circuits
An integrated circuit package includes a first conductive element that is fabricated as part of the integrated circuit package and a micro-wire having a first end coupled to the first conductive element. The micro-wire has been fabricated ex-situ and is of a metal having a diameter of 10 microns or less.
SEMICONDUCTOR DIE WITH MULTIPLE CONTACT PADS ELECTRICALLY COUPLED TO A LEAD OF A LEAD FRAME
The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.
Backside metalization with through-wafer-via processing to allow use of high q bondwire inductances
A flip-chip integrated circuit die includes a front side including active circuitry formed therein and a plurality of bond pads in electrical communication with the active circuitry, at least two through-wafer vias extending at least partially though the die and having portions at a rear side of the die, and a bond wire external to the die and electrically coupling the portions of the at least two through-wafer vias at the rear side of the die.