Patent classifications
H01L2224/4845
System and method for routing signals in complex quantum systems
Embodiments of the present invention disclose a computer system having a plurality of quantum circuits arranged in a two-dimensional plane-like structure, the quantum circuits comprising qubits and busses (i.e., qubit-qubit interconnects), and a method of formation therefor. A quantum computer system comprises a plurality of quantum circuits arranged in a two-dimensional pattern. At least one interior quantum circuit, not along the perimeter of the two-dimensional plane of the plurality of quantum circuits, contains a bottom chip, a device layer, a top chip, and a routing layer. A signal wire connects the device layer to the routing layer, wherein the signal wire breaks the two dimensional plane, for example, the signal wire extends into a different plane.
INFRA-RED DEVICE
We disclose an Infrared (IR) device comprising a first substrate comprising a first cavity; a dielectric layer disposed on the first substrate; a second substrate disposed on the dielectric layer and on the opposite side of the first substrate, the second substrate having a second cavity. The device further comprises an optically transmissive layer attached to one of the first and second substrates; a further layer provided to another of the first and second substrates so that the IR device is substantially closed. Holes are provided through the dielectric layer so that a pressure in the first cavity is substantially the same level as a pressure in the second cavity.
Semiconductor devices with package-level configurability
A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.
SYSTEM AND METHOD FOR ROUTING SIGNALS IN COMPLEX QUANTUM SYSTEMS
Embodiments of the present invention disclose a computer system having a plurality of quantum circuits arranged in a two-dimensional plane-like structure, the quantum circuits comprising qubits and busses (i.e., qubit-qubit interconnects), and a method of formation therefor. A quantum computer system comprises a plurality of quantum circuits arranged in a two-dimensional pattern. At least one interior quantum circuit, not along the perimeter of the two-dimensional plane of the plurality of quantum circuits, contains a bottom chip, a device layer, a top chip, and a routing layer. A signal wire connects the device layer to the routing layer, wherein the signal wire breaks the two dimensional plane, for example, the signal wire extends into a different plane.
SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY
A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.
SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY
A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.
ANTENNA PACKAGING SOLUTION
A first and second antenna substrate are included in an advanced antenna package. Each antenna substrate includes a respective array of antenna elements disposed on a respective first surface of the substrate. A plurality of stand-off balls disposed between the first surfaces of first and second antenna substrates are bonded to the first surface of the first antenna substrate. A first sub-plurality of the stand-off balls are placed at positions in a peripheral region of the first and second antenna substrates. A second sub-plurality of the stand-off balls are placed at interior positions between antenna elements of the first and second antenna substrates. A plurality of adhesive pillars are disposed between and bond the first surfaces of first and second antenna substrates at a plurality of discrete selected locations. A first location of the discrete selected locations is in a peripheral region. A second location of the discrete selected locations is at an interior position between antenna elements. A method for fabricating the antenna package is also described.
RECEIVER OPTICAL MODULE AND PROCESS OF ASSEMBLING THE SAME
A receiver optical module that receives an optical signal and generating an electrical signal corresponding to the optical signal is disclosed. The module includes a photodiode (PD), a sub-mount, a pre-amplifier, and a stem. The sub-mount, which is made of insulating material, mounts the PD thereon. The pre-amplifier, which receives the photocurrent generated by the PD, mounts the PD through the sub-mount with an adhesive. The pre-amplifier generates an electrical signal corresponding to the photocurrent and has signal pads and other pads. The stem, which mounts the pre-amplifier, provides lead terminals wire-bonded with the signal pads of the pre-amplifier. The signal pads make distances against the sub-mount that are greater than distances from the other pads to the sub-mount.
STRUCTURES AND METHODS FOR CAPACITIVE ISOLATION DEVICES
Described examples include a packaged device including a first object and a second object spaced from each other by a gap, each object having a first surface and an opposite second surface, the first surfaces of the first object and the second object including first terminals. A structure includes at least two conductors embedded in a dielectric casing consolidating a configuration and organization of the at least two conductors, the at least two conductors having end portions un-embedded by the dielectric casing. An end portion of at least one of the at least two conductors is electrically connected to a first terminal of the first object, and an opposite end portion of the at least one of the at least two conductors is electrically connected to a respective first terminal of the second object, the at least two conductors electrically connecting the first object and the second object.
SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME
A semiconductor assembly includes a face-to-face semiconductor sub-assembly electrically coupled to a circuit board by bonding wires. The face-to-face semiconductor sub-assembly includes top and bottom devices assembled on opposite sides of a routing circuitry, and is disposed in a through opening of the circuit board. The bonding wires provide electrical connections between the routing circuitry and the circuit board to interconnect the devices face-to-face assembled in the sub-assembly with the circuit board for next-level connection from two opposite sides of the circuit board.