A semiconductor device including a package substrate having, at the periphery of the main surface thereof, bonding leads disposed in a row, a semiconductor chip mounted inside of the row of the bonding leads on the main surface of the package substrate, wires for connecting pads of the semiconductor chip and the bonding leads of the substrate, a sealing body for resin sealing the semiconductor chip and the wires, and solder bumps disposed on the back surface of the package substrate. The top of a loop of each of the wires is disposed outside the wire connecting portion so that the wire connection between the bonding leads and the pads of the semiconductor chip has a stable loop shape to prevent wire connection failure.

A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface thereof. Containing an element that provides bonding reliability in a high-temperature environment improves the bonding reliability of the ball bonded part in high temperature. Furthermore, making an orientation proportion of a crystal orientation <100> angled at 15 degrees or less to a wire longitudinal direction among crystal orientations in the wire longitudinal direction 30% or more when measuring crystal orientations on a cross-section of the core material in a direction perpendicular to a wire axis of the bonding wire, and making an average crystal grain size in the cross-section of the core material in the direction perpendicular to the wire axis of the bonding wire 0.9 to 1.5 m provides a strength ratio of 1.6 or less.

A bonding wire for a semiconductor device, characterized in that the bonding wire includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, the bonding wire contains an element that provides bonding reliability in a high-temperature environment, and a strength ratio defined by the following Equation (1) is 1.1 to 1.6:

Strength ratio=ultimate strength/0.2% offset yield strength.(1)

A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.

A method of forming a wire interconnect structure includes the steps of: (a) forming a wire bond at a bonding location on a substrate using a wire bonding tool; (b) extending a length of wire, continuous with the wire bond, to another location; (c) pressing a portion of the length of wire against the other location using the wire bonding tool; (d) moving the wire bonding tool, and the pressed portion of the length of wire, to a position above the wire bond; and (e) separating the length of wire from a wire supply at the pressed portion, thereby providing a wire interconnect structure bonded to the bonding location.

A semiconductor device, includes: a semiconductor element having element main surface and element back surface spaced apart from each other in thickness direction and including a plurality of main surface electrodes arranged on the element main surface; a die pad having a die pad main surface where the semiconductor element is mounted; a plurality of leads including at least one first lead arranged on one side in first direction orthogonal to the thickness direction with respect to the die pad, and arranged around the die pad when viewed in the thickness direction; a plurality of connecting members including a first connecting member bonded to the at least one first lead, and configured to electrically connect the main surface electrodes and the leads; and a resin member configured to seal the semiconductor element, a part of the die pad, parts of the leads, and the connecting members.

A ball-bond arrangement comprising a bond pad of a semiconductor device and a wire ball-bonded to the bond pad, wherein the wire extending from the bonded ball has a diameter of 15 to 50 m, and comprises a silver-based wire core with a surface, the wire core having a coating layer superimposed on its surface, wherein the coating layer is a double-layer comprised of a 1 to 40 nm thick inner layer of palladium or nickel and an adjacent 20 to 500 nm thick outer layer of gold, and wherein the surface of the bonded ball has a gold coverage of 70 to 100%.

A semiconductor device, includes: a semiconductor element having element main surface and element back surface spaced apart from each other in thickness direction and including a plurality of main surface electrodes arranged on the element main surface; a die pad having a die pad main surface where the semiconductor element is mounted; a plurality of leads including at least one first lead arranged on one side in first direction orthogonal to the thickness direction with respect to the die pad, and arranged around the die pad when viewed in the thickness direction; a plurality of connecting members including a first connecting member bonded to the at least one first lead, and configured to electrically connect the main surface electrodes and the leads; and a resin member configured to seal the semiconductor element, a part of the die pad, parts of the leads, and the connecting members.

A method of forming a wire interconnect structure includes the steps of: (a) forming a wire bond at a bonding location on a substrate using a wire bonding tool; (b) extending a length of wire, continuous with the wire bond, to another location; (c) pressing a portion of the length of wire against the other location using the wire bonding tool; (d) moving the wire bonding tool, and the pressed portion of the length of wire, to a position above the wire bond; and (e) separating the length of wire from a wire supply at the pressed portion, thereby providing a wire interconnect structure bonded to the bonding location.

A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.