Patent classifications
H01L2224/4847
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
A semiconductor device with low power consumption is provided. In a cascode circuit including a first transistor provided on a low power supply potential side and a second transistor provided on a high power supply potential side, a source or a drain of a third transistor and a capacitor are connected to a gate of the second transistor. A gate of the first transistor is electrically connected to a back gate of the second transistor. An OS transistor is used as the third transistor.
Resistive element
A resistive element includes: a semiconductor substrate; a lower insulating film deposited on the semiconductor substrate; a resistive layer deposited on the lower insulating film; an interlayer insulating film covering the resistive layer; a pad-forming electrode deposited on the interlayer insulating film, and including a first edge portion connected to one edge portion of the resistive layer and a second edge portion opposite to the first edge portion to be in electrical Schottky contact with the semiconductor substrate; a relay wire having one edge connected to another edge portion of the resistive layer to form an ohmic contact to the semiconductor substrate; and a counter electrode provided under the semiconductor substrate, wherein the resistive element uses a resistance value between the pad-forming electrode and the counter electrode.
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE
The semiconductor device includes: an insulating substrate having metal layers provided at a front surface and a back surface; a semiconductor element having a lower surface joined onto the metal layer on a front surface side, and having an electrode on an upper surface; a base plate; a case member; a terminal member; a wiring member that connects the terminal member and the semiconductor element; a metal thin film member that continuously covers a surface of the terminal member and a surface of the electrode connected by the wiring member, and a surface of the wiring member; and a filling member that covers a surface of the metal thin film member and the insulating substrate exposed from the metal thin film member, and is filled in a region surrounded by the base plate and the case member.
Light-emitting device and method for manufacturing the same
A highly reliable light-emitting device and a manufacturing method thereof are provided. A light-emitting element and a terminal electrode are formed over an element formation substrate; a first substrate having an opening is formed over the light-emitting element and the terminal electrode with a bonding layer provided therebetween; an embedded layer is formed in the opening; a transfer substrate is formed over the first substrate and the embedded layer; the element formation substrate is separated; a second substrate is formed under the light-emitting element and the terminal electrode; and the transfer substrate and the embedded layer are removed. In addition, an anisotropic conductive connection layer is formed in the opening, and an electrode is formed over the anisotropic conductive connection layer. The terminal electrode and the electrode are electrically connected to each other through the anisotropic conductive connection layer.
Semiconductor device and method of stacking semiconductor die for system-level ESD protection
A semiconductor device has a first semiconductor die including a first protection circuit. A second semiconductor die including a second protection circuit is disposed over the first semiconductor die. A portion of the first semiconductor die and second semiconductor die is removed to reduce die thickness. An interconnect structure is formed to commonly connect the first protection circuit and second protection circuit. A transient condition incident to the interconnect structure is collectively discharged through the first protection circuit and second protection circuit. Any number of semiconductor die with protection circuits can be stacked and interconnected via the interconnect structure to increase the ESD current discharge capability. The die stacking can be achieved by disposing a first semiconductor wafer over a second semiconductor wafer and then singulating the wafers. Alternatively, die-to-wafer or die-to-die assembly is used.
Silicon carbide device and method for forming a silicon carbide device
A silicon carbide device includes a silicon carbide substrate, a contact layer including nickel, silicon and aluminum, a barrier layer structure including titanium and tungsten, and a metallization layer including copper. The contact layer is located on the silicon carbide substrate. The contact layer is located between the silicon carbide substrate and at least a part of the barrier layer structure. The barrier layer structure is located between the silicon carbide substrate and the metallization layer.
Semiconductor device comprising sealing members with different elastic modulus and method for manufacturing semiconductor device
According to an aspect of the present disclosure, a semiconductor device includes a base plate, a first semiconductor chip provided above the base plate, a bonding wire joined with the first semiconductor chip at a first joint part and having a curved part above the first joint part, a first sealing member provided from an upper surface of the base plate up to a height higher than the first joint part and lower than the curved part, the first sealing member covering the first joint part and a second sealing member provided on the first sealing member, covering the curved part, and having an elastic modulus lower than an elastic modulus of the first sealing member.
SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor substrate having a first main surface; an aluminum electrode having a first surface facing the first main surface and a second surface opposite to the first surface, the aluminum electrode being disposed on the semiconductor substrate; a passivation film that covers a peripheral edge of the second surface and that is provided with an opening from which a portion of the second surface is exposed; a copper film disposed on the second surface exposed from the opening so as to be separated from the passivation film; and a metal film disposed on the second surface exposed from between the passivation film and the copper film. The metal film is constituted of at least one selected from a group consisting of a nickel film, a tantalum film, a tantalum nitride film, a tungsten film, a titanium film, and a titanium nitride film.
SEMICONDUCTOR DEVICE
A semiconductor device of the present disclosure includes: a semiconductor substrate having a first main surface; a first aluminum electrode having a first surface facing the first main surface and a second surface opposite to the first surface, the first aluminum electrode being disposed on the semiconductor substrate; a passivation film that covers a peripheral edge of the second surface and that is provided with an opening from which a portion of the second surface is exposed; and a copper film. The second surface exposed from the opening is provided with a recess that is depressed toward the first surface. The copper film is disposed in the recess.
Power semiconductor module and power conversion device
There are provided a small-sized power semiconductor module and a small-sized power conversion device capable of reducing ringing voltage. A power semiconductor module includes: a positive electrode-side switching element and a positive electrode-side freewheeling diode corresponding to a positive electrode-side power semiconductor element; a negative electrode-side switching element and a negative electrode-side freewheeling diode corresponding to a negative electrode-side power semiconductor element; a positive electrode conductor pattern; a negative electrode conductor pattern; an AC electrode pattern; and a snubber substrate including an insulating substrate having a snubber circuit formed thereon. The snubber substrate includes the insulating substrate and the at least one snubber circuit arranged on the insulating substrate. The snubber substrate is arranged on at least one of the positive electrode conductor pattern, the negative electrode conductor pattern and the AC electrode pattern.