In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. A first electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a first lead. A second electrical interconnect is coupled between the control terminal of the semiconductor device and a second lead.

A semiconductor device includes: a first semiconductor element including a first signal electrode; a second semiconductor element, laminated on the first semiconductor element, including a second signal electrode; a sealing body; a first signal terminal connected to the first signal electrode; and a second signal terminal connected to the second signal electrode, wherein: the first signal terminal and the second signal terminal project from the sealing body and extend in a first direction; the first signal terminal and the second signal terminal are distanced from each other in a second direction; the first signal electrode and the second signal electrode are placed at different positions in the second direction; the first signal electrode is provided closer to the first signal terminal than to the second signal terminal; and the second signal electrode is provided closer to the second signal terminal than to the first signal terminal.

In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. The control terminal of the first electrical interconnect is coupled to a first lead by a first electrical interconnect. A second electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a second lead. The second current carrying terminal of the first semiconductor device is coupled to the device receiving structure or to the interconnect structure.

A semiconductor chip is mounted on a leadframe. A first portion of an insulating package for the semiconductor chip is formed from laser direct structuring (LDS) material molded onto the semiconductor chip. A conductive formation (provided by laser-drilling the LDS material and plating) extends between the outer surface of the first portion of insulating package and the semiconductor chip. An electrically conductive clip is applied onto the outer surface of the first portion of the insulating package, with the electrically conductive clip electrically coupled to the conductive formation and the leadframe. A second portion of the insulating package is made from package molding material (epoxy compound) molded onto the electrically conductive clip and applied onto the outer surface of the first portion of the insulating package.

In a non-insulated DC-DC converter having a circuit in which a power MOSFET high-side switch and a power MOSFET low-side switch are connected in series, the power MOSFET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOSFET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOSFET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.

A semiconductor device includes a semiconductor chip having a source electrode on the front surface thereof, a diode that has an anode electrode on the front surface thereof, and a first conductive member through which output signals from the source electrode pass. The semiconductor device further includes a first wiring member that electrically connects the source electrode and the first conductive member, and a second wiring member that electrically connects the anode electrode and the first conductive member and that has a wider surface area than the first wiring member. The semiconductor device includes a second conductive member where the semiconductor chip and the diode are arranged.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.

A compact and high-reliability semiconductor device is implemented. The bonding wires situated in the vicinity of a gate, and the bonding wires situated in the vicinity of a vent facing to the gate across the center of a semiconductor chip in a molding step have a loop shape falling inwardly of the semiconductor chip, have a weaker pulling force (tension) than those of other bonding wires, and are loosely stretched with a margin. The bonding wires situated in the vicinity of the gate in the molding step are, for example, a first wire and a fifth wire to be connected with a first electrode pad and a fifth electrode pad, respectively. Whereas, the bonding wires situated in the vicinity of the vent in the molding step are, for example, a third wire and a seventh wire to be connected with a third electrode pad and a seventh electrode pad, respectively.

A plurality of wires of a semiconductor device includes: a first wire connected to each of an end portion electrode and a first terminal of a plurality of terminals; and a second wire connected to each of a non-end portion electrode and a second terminal of the plurality of terminals. A loop height of the first wire is greater than a loop height of the second wire.