Patent classifications
H01L2224/49051
Embedded wire bond wires
Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.
Module and method for manufacturing the module
A module includes a first substrate including first electrodes; a first element bonded to the first substrate, and including second electrodes disposed at a first end of the first element and third electrodes disposed at a second end of the first element opposite from the first end; a second substrate stacked on the first substrate and including a recess; and a second element bonded to a bottom surface of the recess of the second substrate and including fourth electrodes. The first electrodes of the first substrate are electrically connected to the second electrodes at the first end of the first element, and the third electrodes at the second end of the first element are electrically connected to the fourth electrodes of the second element via a through hole formed in the bottom surface of the recess.
METHODS OF FORMING A MICROELECTRONIC DEVICE STRUCTURE, AND RELATED MICROELECTRONIC DEVICE STRUCTURES AND MICROELECTRONIC DEVICES
A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.
METHODS OF FORMING A MICROELECTRONIC DEVICE STRUCTURE, AND RELATED MICROELECTRONIC DEVICE STRUCTURES AND MICROELECTRONIC DEVICES
A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.
SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. The control terminal of the first electrical interconnect is coupled to a first lead by a first electrical interconnect. A second electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a second lead. The second current carrying terminal of the first semiconductor device is coupled to the device receiving structure or to the interconnect structure.
SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD OF THE SAME
In a non-insulated DC-DC converter having a circuit in which a power MOSFET high-side switch and a power MOSFET low-side switch are connected in series, the power MOSFET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOSFET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOSFET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.
SEMICONDUCTOR PACKAGE
A semiconductor package includes a package substrate, a stack structure on the package substrate and including a plurality of semiconductor chips stacked sequentially and offset, and a plurality of chip selection wires configured to respectively electrically connect the package substrate to the plurality of semiconductor chips of the stack structure, wherein each of the plurality of semiconductor chips includes a plurality of chip selection pads, each of the plurality of chip selection wires extends from the package substrate to one of the plurality of semiconductor chips along side and top surfaces of the stack structure, and extension lengths of the plurality of chip selection wires are different from each other.
Semiconductor package with balanced wiring structure
Provided is a semiconductor package having improved signal integrity (SI) and a chip stack structure of a plurality of semiconductor chips. The semiconductor package includes a package substrate, a chip stack structure on the package substrate and including at least two semiconductor chips, and an external connection terminal on a lower surface of the package substrate. A first semiconductor chip arranged uppermost in the chip stack structure is connected to a first bonding pad of the package substrate through a first wire. A second semiconductor chip arranged under the first semiconductor chip in the chip stack structure is connected to a second bonding pad of the package substrate through a second wire. When the first bonding pad is farther from the external connection terminal than the second bonding pad, the external connection terminal is connected to the first bonding pad through a wiring line of the package substrate.
METHOD AND APPARATUS FOR ELECTRICAL BOND PROTECTION
A method for forming a light-emitting device, a non-transitory computer storage medium storing instructions for manufacturing and a light-emitting device that improve the reliability of light-emitting diode (LED) systems. The reliability is improved by: attaching a printed circuit board (PCB) to a heat sink, then attaching a top contact LED to the same heat sink, and electrically connecting the PCB to the LED using conductive elements, such as wires that may be bent upwards or downwards. This comprehensive approach not only ensures efficient heat management and electrical connectivity but also protects and isolates the conductive elements, enhancing the durability and performance of the light-emitting device.
SEMICONDUCTOR DEVICE, METHOD FOR DESIGNING THE SAME, AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device is provided with a first lead and a second lead spaced apart from each other in a first direction, a first semiconductor element including a first functional part and supported by the first lead, and a second semiconductor element including a second functional part and supported by the second lead. Each of the first functional part and the second functional part transmits an electrical signal in an insulated state. The distance d1 between the first lead and the second lead in the first direction is greater than a predetermined distance d0.