Patent classifications
H01L2224/4909
Wiring with external terminal
Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a connection wiring of a ring-shape having comprising a hole and a conductive layer surrounding the hole, the conductive layer including a first connection point and a second connection point that are located so that a straight line between the first connection point and the second connection point crosses over the hole; an external terminal coupled to the first connection point of the conductive layer of the connection wiring; and an internal circuit coupled to the second connection point of the conductive layer of the connection wiring.
Semiconductor memory package
A semiconductor memory package is provided. The package includes a base substrate, and chip connection pads and external connection pads respectively arranged on upper and lower surfaces of the base substrate; and two semiconductor memory chips mounted on the base substrate each having chip pads electrically connected to the chip connection pads. A first electrical path extends from an external connection pad to a first chip pad of one of the chips and a second electrical path extends from the external connection pad to a second chip pad of another chip, the first and second electrical paths have a common line, and the first electrical path has a first branch line and the second electrical path has a second branch line. The base substrate includes an open stub extending from the common line and having an end which is open without being connected to another electrical path.
WIRING WITH EXTERNAL TERMINAL
Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a connection wiring of a ring-shape having comprising a hole and a conductive layer surrounding the hole, the conductive layer including a first connection point and a second connection point that are located so that a straight line between the first connection point and the second connection point crosses over the hole; an external terminal coupled to the first connection point of the conductive layer of the connection wiring; and an internal circuit coupled to the second connection point of the conductive layer of the connection wiring.
Semiconductor device and semiconductor module provided with same
It is an object of the present invention to provide a semiconductor device which allows an increase in the number of semiconductor elements mounted in parallel and prevents a shape of an insulating substrate onto which the semiconductor elements are mounted, from being laterally long, and provide a semiconductor module including such semiconductor device. A semiconductor device according to the present invention includes an insulating substrate, a metal pattern which is a continuous piece and is bonded to one main surface of the insulating substrate, and a plurality of switching elements which are bonded to a surface opposite to the insulating substrate on the metal pattern, and the plurality of switching elements are arranged in a matrix of two or more rows and two or more columns on the metal pattern.
Radio frequency power component and radio frequency signal transceiving device
The application provides an apparatus, including a first section, a second section, and a first bonding wire group, where the first bonding wire group includes at least three first bonding wire units. The first bonding wire unit includes at least one arc-shaped bonding wire, one end and the other end of the first bonding wire unit are electrically connected to electrodes of the first section and the second section, respectively, where arc heights of first bonding wire units located at two sides of the first bonding wire group are higher than an arc height of a first bonding wire unit at another position, and an arc height of a first bonding wire unit located in a central area of the first bonding wire group is lower than an arc height of a first bonding wire unit at another position.
SEMICONDUCTOR MEMORY PACKAGE
A semiconductor memory package is provided. The package includes a base substrate, and chip connection pads and external connection pads respectively arranged on upper and lower surfaces of the base substrate; and two semiconductor memory chips mounted on the base substrate each having chip pads electrically connected to the chip connection pads. A first electrical path extends from an external connection pad to a first chip pad of one of the chips and a second electrical path extends from the external connection pad to a second chip pad of another chip, the first and second electrical paths have a common line, and the first electrical path has a first branch line and the second electrical path has a second branch line. The base substrate includes an open stub extending from the common line and having an end which is open without being connected to another electrical path.
SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE
The object of the present invention is to provide a semiconductor device capable of reducing the influence of gas generated from a resin to which a fire retardant is not added, and a power conversion device including the semiconductor device. The semiconductor device according to the present invention includes: a semiconductor element disposed on an insulating substrate; a case disposed around an outer edge of the insulating substrate, the case including an opening facing the semiconductor element; a sealing resin sealing the semiconductor element in the case; and a lid closing the opening of the case, wherein the sealing resin does not contain a fire retardant, the lid contains the fire retardant, and a space is provided between the sealing resin and the lid.
Light emitting apparatus
A light emitting apparatus includes a package having a long-length direction and a short-length direction perpendicular to the long-length direction as viewed in plan view. The package includes first and second leadframes and a resin portion. The first leadframe has a first leadframe main portion and a first leadframe extension portion which has narrower width than that of the first leadframe main portion. The second leadframe has a second leadframe main portion and a second leadframe extension portion which has narrower width than that of the second leadframe main portion. An inclined portion is formed between the first leadframe and the second leadframe as viewed in plan view. An upper end of the inclined portion is shifted from a lower end of the inclined portion.
SEMICONDUCTOR CHIP PACKAGE COMPRISING SUBSTRATE, SEMICONDUCTOR CHIP, AND LEADFRAME AND A METHOD FOR FABRICATING THE SAME
A semiconductor chip package may comprise a semiconductor chip disposed on a substrate. The semiconductor chip may have a first surface and a second surface. The first surface of the semiconductor chip may be connected to the substrate. The semiconductor chip package may comprise a leadframe that includes a first lead and a second lead. The first lead of the leadframe may be directly attached to the second surface of the semiconductor chip. The second lead of the leadframe may be directly attached to the substrate.
SEMICONDUCTOR CHIP PACKAGE COMPRISING SUBSTRATE, SEMICONDUCTOR CHIP, AND LEADFRAME AND A METHOD FOR FABRICATING THE SAME
A semiconductor chip package may comprise a semiconductor chip disposed on a substrate. The semiconductor chip may have a first surface and a second surface. The first surface of the semiconductor chip may be connected to the substrate. The semiconductor chip package may comprise a leadframe that includes a first lead and a second lead. The first lead of the leadframe may be directly attached to the second surface of the semiconductor chip. The second lead of the leadframe may be directly attached to the substrate.