A method of manufacturing a WBGA package includes providing a carrier having a first surface and a second surface opposite to the first surface of the carrier, wherein the carrier has a through hole extending between the first surface and the second surface of the carrier; disposing an electronic component on the second surface of the carrier, wherein the electronic component includes a first bonding pad and a second bonding pad; and electrically connecting the first bonding pad and the second bonding pad through a first bonding wire.

A display apparatus includes a support substrate, a plurality of light emitting structures regularly arranged on the support substrate, and a wavelength conversion part disposed on the plurality of light emitting structures. The wavelength conversion part includes light transmitting portions and blocking portions, the light transmitting portions being disposed on the light emitting structures, respectively, and each of the light transmitting portions including a phosphor for converting a wavelength of light emitted from the corresponding light emitting structure. The support substrate includes a plurality of conductive patterns electrically connected to the light emitting structures, and the light emitting structures are coupled to the plurality of conductive patterns.

An integrated circuit package includes a lead frame and an encapsulation that substantially encloses the lead frame. The lead frame further includes a first conductor comprising a first conductive loop and a second conductor galvanically isolated from the first conductor, proximate to and magnetically coupled to the first conductive loop to provide a communication link between the first and second conductor. The second conductor includes a first conductive portion, a second conductive portion, and a wire coupling together the first conductive portion and the second conductive portion.

A half bridge power module (1) comprising a substrate (2) comprising an inner load track (11), two intermediate load tracks (12, 14) and two outer load tracks (10,13), wherein an external terminal is mounted on one of the intermediate load tracks (12, 14), an external terminal (3, 4) is mounted on one of the outer load tracks (10, 13) and an external terminal (5) is mounted on the inner load track (11); wherein semiconductor switches (101, 12, 105, 106) are mounted on the outer load tracks (10, 13) and are electrically connected to the intermediate load track (12); and semiconductor switches (103, 104, 107, 108) are mounted on the intermediate load tracks (12, 14) and are electrically connected to the inner load track (11).

A semiconductor memory device includes first and second memory chips, each including a region of a core circuit, a first area adjacent to a first side of the region in a first direction, a second area adjacent to a second side of the region in a second direction, a third area adjacent to the first area in the first direction and to the second area in the second direction, a first pad in the first area, a second pad in the second area, and third pad in the third area. In each memory chip, a first bonding wire connects the first and third pads. In addition, a second bonding wire connects the second pads of the first and second memory chips. The second memory chip is stacked on the first memory chip to expose the first, second, and third areas of the first memory chip in a third direction.

A MEMS pressure sensor packaged with a molding compound. The MEMS pressure sensor features a lead frame, a MEMS semiconductor die, a second semiconductor die, multiple pluralities of bonding wires, and a molding compound. The MEMS semiconductor die has an internal chamber, a sensing component, and apertures. The MEMS semiconductor die and the apertures are exposed to an ambient atmosphere. A method is desired to form a MEMS pressure sensor package that reduces defects caused by mold flashing and die cracking. Fabrication of the MEMS pressure sensor package comprises placing a lead frame on a lead frame tape; placing a MEMS semiconductor die adjacent to the lead frame and on the lead frame tape with the apertures facing the tape and being sealed thereby; attaching a second semiconductor die to the MEMS semiconductor die; attaching pluralities of bonding wires to form electrical connections between the MEMS semiconductor die, the second semiconductor die, and the lead frame; and forming a molding compound.

A display apparatus includes: a transparent substrate; a panel substrate; a light emitting diode disposed between the transparent substrate and the panel substrate; an insulation layer covering side surfaces of the light emitting diode; a first connection electrode electrically connected to the light emitting diode and disposed on the insulation layer between the insulation layer and the panel substrate; a second connection electrode on the panel substrate; and an electrode connector electrically connecting the first connection electrode to the second connection electrode, wherein the first connection electrode has an overlapping portion overlapping with the light emitting diode and a non-overlapping portion laterally extending from the overlapping portion on the insulation layer.

A semiconductor package device includes a leadframe, a first die and a package body. The leadframe includes a first die paddle and a lead. The first die paddle has a first surface and a second surface opposite to the first surface. The first die is disposed on the first surface of the first die paddle. The package body covers the first die and at least a portion of the first surface of the first die paddle and exposing the lead. The package body has a first surface and a second surface opposite to the first surface. The second surface of the package body is substantially coplanar with the second surface of the first die paddle. The lead extends from the second surface of the package body toward the first surface of the package body. A length of the lead is greater than a thickness of the package body.

A portion of a source electrode exposed by an opening in a passivation film is used as a portion of a source pad. A first portion of the source pad includes a plating film formed by a material that is harder than a material of the source electrode. During screening, a probe needle that is a metal contact contacts the plating film that is on the first portion of the source pad. A second portion of the source pad has a layer structure different from that of the first portion of the source pad and in a second direction parallel to the front surface of the semiconductor chip, is disposed adjacently to and electrically connected to the first portion of the source pad. A bonding wire is wire bonded to the second portion of the source pad after an inspection process of the semiconductor chip.

An insulated gate bipolar field-effect transistor (IGBT) includes a semiconductor chip, a gate pin disposed around the semiconductor chip, and an emitter region and n gate regions that are disposed on the semiconductor chip, where n is an integer greater than or equal to 2; x gate regions in the n gate regions are connected to the gate pin, where x is greater than or equal to 1 and less than or equal to n; when there is a different quantity x of gate regions connected to the gate pin, the IGBT is correspondingly applicable to a scenario in which there is a different switching frequency and a different switching loss; and n−x gate regions in the n gate regions are connected to the emitter region.