Patent classifications
H01L2224/4918
SEMICONDUCTOR DEVICE WITH FRAME HAVING ARMS AND RELATED METHODS
A semiconductor device may include a circuit board having an opening, and a frame. The frame may have an IC die pad in the opening, and arms extending outwardly from the IC die pad and coupled to the circuit board. The semiconductor device may include an IC mounted on the IC die pad, bond wires coupling the circuit board with the IC, and encapsulation material surrounding the IC, the bond wires, and the arms.
COMPACT STACKED POWER MODULES FOR MINIMIZING COMMUTATING INDUCTANCE AND METHODS FOR MAKING THE SAME
A compact stacked power module including a positive direct-current-bus-voltage plate having a positive-plate surface and a negative direct-current-bus-voltage plate having a negative-plate surface. The compact stacked power module also includes an alternating-current output plate having opposing first and second output-plate surfaces, a first semiconductor switch contacting the negative-plate surface and the first output-plate surface, and a second semiconductor switch contacting the positive-plate surface and the second output-plate surface. The compact stacked power module further includes a capacitor contacting the negative-plate surface and the positive-plate surface, wherein the capacitor is electrically in parallel with the first and second semiconductor switches.
Integrated circuit chip using top post-passivation technology and bottom structure technology
Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.
INTEGRATED STACKED SUBSTRATE FOR ISOLATED POWER MODULE
A microelectronic device includes a die pad having a first surface and a second, opposite, surface. A first component is directly attached to the first surface of the die pad through a first thermally conductive material. A second component is directly attached to the second surface of the die pad through a second thermally conductive material. At least a portion of the second component overlaps at least a portion of the first component. The microelectronic device further includes a first thermal shunt connecting the die pad to a first lead, and a second thermal shunt connecting the die pad to a second lead. The first thermal shunt is closer to a center of the first component than to a center of the second component. The second thermal shunt is closer to a center of the second component than to a center of the first component.