Patent classifications
H
H01
H01L
2224/00
H01L2224/01
H01L2224/42
H01L2224/47
H01L2224/49
H01L2224/494
H01L2224/4941
H01L2224/4941
Semiconductor device having a sealing layer covering a semiconductor memory unit and a memory controller
A semiconductor device includes a substrate, a semiconductor memory unit mounted on a surface of the substrate, a memory controller configured to control the semiconductor memory unit and mounted on the surface of the substrate adjacent to the semiconductor memory unit, and a sealing layer disposed on the surface of the substrate and covering the semiconductor memory unit and the memory controller.