H01L2224/80125

Semiconductor structure

A semiconductor structure includes: a first die, comprising a first interconnect structure and a first active pad electrically connected to the first interconnect structure; a first bonding dielectric layer over the first die; a first active bonding via in the first bonding dielectric layer, electrically connected to the first interconnect structure; and a plurality of first dummy bonding vias in the first bonding dielectric layer, wherein the first dummy bonding vias laterally surround the first active bonding via and are electrically floating.

SEMICONDUCTOR STRUCTURE

A semiconductor structure includes: a first die, comprising a first interconnect structure and a first active pad electrically connected to the first interconnect structure; a first bonding dielectric layer over the first die; a first active bonding via in the first bonding dielectric layer, electrically connected to the first interconnect structure; and a plurality of first dummy bonding vias in the first bonding dielectric layer, wherein the first dummy bonding vias laterally surround the first active bonding via and are electrically floating.

Method of fabricating semiconductor structure

Semiconductor packages and methods of forming the same are disclosed. One of the methods includes the following steps. A first die is provided, wherein the first die comprises a first substrate, a first interconnect structure over the first substrate, and a first pad disposed over and electrically connected to the first interconnect structure. A first bonding dielectric layer is formed over the first die to cover the first die. By using a single damascene process, a first bonding via penetrating the first bonding dielectric layer is formed, to electrically connect the first interconnect structure.

SUBSTRATE BONDING APPARATUS
20210082863 · 2021-03-18 · ·

According to one embodiment, in a substrate bonding apparatus a first chucking stage includes a first stage base, a plurality of first cylindrical members, and a plurality of first drive mechanisms. The first stage base includes a first main face facing a second chucking stage. The plurality of first cylindrical members are disposed on the first main face. The plurality of first cylindrical members are arrayed in planar directions. The plurality of first cylindrical members protrudes from the first main face in a direction toward the second chucking stage to chuck the first substrate. The plurality of first drive mechanisms are configured to drive the plurality of first cylindrical members independently of each other. The substrate bonding apparatus further comprises a first pressure control mechanism configured to control pressure states of spaces in the plurality of first cylindrical members independently of each other.

SUBSTRATE BONDING APPARATUS, MANUFACTURING SYSTEM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
20210074670 · 2021-03-11 · ·

According to one embodiment, there is provided a substrate bonding apparatus including a first chucking stage, a second chucking stage, and an alignment unit. The first chucking stage is configured to chuck a first substrate. The second chucking stage is disposed facing the first chucking stage. The second chucking stage is configured to chuck a second substrate. The alignment unit is configured to be inserted between the first chucking stage and the second chucking stage. The alignment unit includes a base body, a first detection element, and a second detection element. The base body includes a first main face and a second main face opposite to the first main face. The first detection element is disposed on the first main face. The second detection element is disposed on the second main face.

METHOD OF FABRICATING SEMICONDUCTOR STRUCTURE

Semiconductor packages and methods of forming the same are disclosed. One of the methods includes the following steps. A first die is provided, wherein the first die comprises a first substrate, a first interconnect structure over the first substrate, and a first pad disposed over and electrically connected to the first interconnect structure. A first bonding dielectric layer is formed over the first die to cover the first die. By using a single damascene process, a first bonding via penetrating the first bonding dielectric layer is formed, to electrically connect the first interconnect structure.

SEMICONDUCTOR STRUCTURE

A semiconductor structure includes a first die and a plurality of first dummy pads. The first die includes a first interconnect structure and a first active pad electrically connected to the first interconnect structure. The first dummy pads laterally surround the first active pad and are electrically floating.

SEMICONDUCTOR DEVICE CIRCUITRY FORMED FROM REMOTE RESERVOIRS
20240071989 · 2024-02-29 ·

This document discloses techniques, apparatuses, and systems for semiconductor device circuitry formed from remote reservoirs. A semiconductor assembly includes a first semiconductor die with a layer of dielectric material having an opening. The first semiconductor die further includes a reservoir of conductive material having a first portion located adjacent to the opening, a second portion remote from the opening, and a third portion coupling the first portion and the second portion. A second semiconductor die includes a layer of dielectric material and a contact pad corresponding to the opening. The reservoir of conductive material is heated to volumetrically expand the second portion into the third portion, the third portion into the first portion, and the first portion through the opening to form an interconnect electrically coupling the first semiconductor die and the second semiconductor die at the contact pad. In this way, a connected semiconductor device may be assembled.

Wafer edge partial die engineered for stacked die yield
10431565 · 2019-10-01 · ·

A stacked wafer assembly and method for fabricating the same are described herein. In one example, a stacked wafer assembly includes a first wafer bonded to a second wafer. The first wafer includes a plurality of fully functional dies and a first partial die formed thereon. The second wafer includes a plurality of fully functional dies and a first partial die formed thereon. Bond pads formed over an inductor of the first partial die of the first wafer are bonded to bond pads formed on the first partial die of the second wafer to establish electrical connection therebetween.

REDISTRIBUTION LAYER (RDL) LAYOUTS FOR INTEGRATED CIRCUITS

Exemplary embodiments for redistribution layers of integrated circuits are disclosed. The redistribution layers of integrated circuits of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.