A semiconductor device includes a first stacked body and a second stacked body bonded to the first stacked body. The first stacked body includes a first pad provided on a first bonding surface to which the first stacked body and the second stacked body are bonded. The second stacked body includes a second pad bonded to the first pad on the first bonding surface. When a direction from the first stacked body to the second stacked body is defined as a first direction, a direction intersecting with the first direction is defined as a second direction, a direction intersecting with the first direction and the second direction is defined as a third direction, dimensions of the first pad and the second pad in the third direction are defined as PX1 and PX2, respectively, and dimensions of the first pad and the second pad in the second direction are defined as PY1 and PY2, respectively, the dimensions of the first pad and the second pad satisfy at least one of Equations (1) and (2) below.
PX1>PY1(1)
PY2>PX2(2).

A semiconductor structure includes a first die and a plurality of first dummy pads. The first die includes a first interconnect structure and a first active pad electrically connected to the first interconnect structure. The first dummy pads laterally surround the first active pad and are electrically floating.

An apparatus includes a memory die having a 3D memory structure that includes nonvolatile memory cells in an array area. The nonvolatile memory cells are connected by word lines and bit lines. The word lines are connected to vertical word line vias in a staircase area adjacent to the array area. The vertical word line vias include a first plurality of vertical word line vias connected to first word line bond pads in the staircase area and a second plurality of vertical word line vias connected to second word line bond pads in the array area.

A method of manufacturing a semiconductor structure includes the following steps. A die is provided. The die includes an interconnect structure and an active pad electrically connected to the interconnect structure. A dielectric layer is formed over the die, wherein the dielectric layer is a single layer. An active bonding via is formed in the dielectric layer. The active pad has a first surface facing the interconnect structure and a second surface opposite to the first surface, the active bonding via has a third surface facing the interconnect structure and a fourth surface opposite to the third surface, and the second surface of the active pad is disposed between the third surface and the fourth surface of the active bonding via.

A placement tool is provided for accurately positioning a semiconductor chip onto a wafer. The tool includes a pick-up head to releasably hold the chip, a robotic arm to move the head, and a stepper motor to drive the arm. A controller operates the tool to move the chip over the wafer, lower it to a specific height, and tilt it to a set angle. The tool emits an optical beam toward an alignment pattern in the chip to determine the initial contact point and detect any misalignment. The controller then adjusts the chip's position to correct the misalignment and lowers the chip to make first contact at the corrected location.

A semiconductor device is formed by bonding a first semiconductor die and a second semiconductor die at bonding pads in the first semiconductor die with bonding vias in the second semiconductor die, and by bonding dielectric layers in the first semiconductor die and in the second semiconductor die. Omitting bonding pads from the second semiconductor device, and instead using the bonding vias to bond the first and second semiconductor dies, provides a greater amount of spacing between the bonding vias of the second semiconductor die in that the bonding vias have lesser widths than bonding pads. This enables a greater amount of dielectric material of the dielectric layers of the second semiconductor device to be placed between the bonding vias without (or with minimally) increasing the lateral size of the second semiconductor die.