Patent classifications
H01L2224/8014
METHODS OF PATTERNING A WAFER SUBSTRATE
Embodiments of the present disclosure provide for patterned substrates and methods of forming a patterned substrate, particularly a self-assembly pattern on a surface of a substrate, such as a host substrate, subsequently used in a chip to wafer (C2W) direct bonding process. In one embodiment, a method of patterning a substrate includes depositing a first material layer on a surface of a substrate, depositing a resist layer on the first material layer, patterning the resist layer to form a plurality of openings therethrough, transferring the pattern in the resist layer to the first material layer to form a plurality of self-assembly regions each comprising a hydrophilic assembly surface, and removing the resist layer to expose one or more hydrophobic bounding surfaces. Herein, the first material layer comprises a hydrophobic material.
SEMICONDUCTOR CHIP, PRINTED CIRCUIT BOARD, MULTI-CHIP PACKAGE INCLUDING THE SEMICONDUCTOR CHIP AND PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING THE MULTI-CHIP PACKAGE
A multi-chip package may include a plurality of semiconductor chips and a printed circuit board (PCB). Each of the semiconductor chips may have an upper surface, a bottom surface, and a plurality of side surfaces. Circuit terminals may be arranged on the upper surface. A plurality of side bonding pads may be arranged on one or more selected side surface among the side surfaces. The semiconductor chips may be mounted on the PCB. The PCB may be configured to surround the selected side surface on which the side bonding pads may be arranged.
Sacrificial alignment ring and self-soldering vias for wafer bonding
A method of bonding a first substrate to a second substrate, wherein the first substrate includes first electrical contacts on a top surface of the first substrate, and wherein the second substrate includes second electrical contacts on a bottom surface of the second substrate. The method includes forming a block of polyimide on the top surface of the first substrate, wherein the block of polyimide has a rounded upper corner, and vertically moving the top surface of the first substrate and the bottom surface of the second substrate toward each other until the first electrical contacts abut the second electrical contacts, wherein during the moving, the second substrate makes contact with the rounded upper corner of the polyimide causing the first and second substrates to move laterally relative to each other.
Sacrificial Alignment Ring And Self-Soldering Vias For Wafer Bonding
A method of bonding a first substrate to a second substrate, wherein the first substrate includes first electrical contacts on a top surface of the first substrate, and wherein the second substrate includes second electrical contacts on a bottom surface of the second substrate. The method includes forming a block of polyimide on the top surface of the first substrate, wherein the block of polyimide has a rounded upper corner, and vertically moving the top surface of the first substrate and the bottom surface of the second substrate toward each other until the first electrical contacts abut the second electrical contacts, wherein during the moving, the second substrate makes contact with the rounded upper corner of the polyimide causing the first and second substrates to move laterally relative to each other.
Method and Structure of Three-Dimensional Chip Stacking
A method includes placing a first plurality of device dies over a first carrier, with the first plurality of device dies and the first carrier in combination forming a first composite wafer. The first composite wafer is bonded to a second wafer, and the first plurality of device dies is bonded to a second plurality of device dies in the second wafer through hybrid bonding. The method further includes de-bonding the first carrier from the first plurality of device dies, encapsulating the first plurality of device dies in an encapsulating material, and forming an interconnect structure over the first plurality of device dies and the encapsulating material.
Method of transferring micro-light emitting diode for LED display
A method of transferring a micro light emitting diode (LED) to a pixel array panel includes transferring the micro LED by spraying using an inkjet method, wherein the micro LED comprises an active layer comprising a first portion emitting light in a first direction and a second portion emitting the light in a second direction different from the first direction.
Method and structure of three-dimensional chip stacking
A method includes placing a first plurality of device dies over a first carrier, with the first plurality of device dies and the first carrier in combination forming a first composite wafer. The first composite wafer is bonded to a second wafer, and the first plurality of device dies is bonded to a second plurality of device dies in the second wafer through hybrid bonding. The method further includes de-bonding the first carrier from the first plurality of device dies, encapsulating the first plurality of device dies in an encapsulating material, and forming an interconnect structure over the first plurality of device dies and the encapsulating material.
Method and Structure of Three-Dimensional Chip Stacking
A method includes placing a first plurality of device dies over a first carrier, with the first plurality of device dies and the first carrier in combination forming a first composite wafer. The first composite wafer is bonded to a second wafer, and the first plurality of device dies is bonded to a second plurality of device dies in the second wafer through hybrid bonding. The method further includes de-bonding the first carrier from the first plurality of device dies, encapsulating the first plurality of device dies in an encapsulating material, and forming an interconnect structure over the first plurality of device dies and the encapsulating material.