The present disclosure provides a driving substrate and a manufacturing method thereof, and a micro LED bonding method. The driving substrate includes: a base substrate; a driving function layer provided on the base substrate, and including a plurality of driving thin film transistors and a plurality of common electrode lines; a pad layer including a plurality of pads provided on a side of the driving function layer away from the base substrate, each pad including a pad body and a microstructure of hard conductive material provided on a side of the pad body away from the base substrate; and a plurality of buffer structures provided on the side of the driving function layer away from the base substrate, each buffer structure surrounding a portion of a corresponding microstructure close to the base substrate, and a height of the buffer structure being lower than a height of the microstructure.

A semiconductor device assembly is provided. The assembly includes a first semiconductor die and a second semiconductor die disposed over the first semiconductor die. The assembly further includes a plurality of die support structures between the first and second semiconductor dies and a plurality of interconnects between the first and second semiconductor dies. Each of the plurality of die support structures includes a stand-off pillar and a stand-off pad having a first bond material with a first solder joint thickness between them. Each of the plurality of interconnects includes a conductive pillar and a conductive pad having a second bond material with a second solder joint thickness between them. The first solder joint thickness is less than the second solder joint thickness.

A semiconductor device assembly is provided. The assembly includes a first package element and a second package element disposed over the first package element. The assembly further includes a plurality of die support structures between the first and second package elements, wherein each of the plurality of die support structures has a first height, a lower portion surface-mounted to the first package element and an upper portion in contact with the second package element. The assembly further includes a plurality of interconnects between the first and second package elements, wherein each of the plurality of interconnects includes a conductive pillar having a second height, a conductive pad, and a bond material with a solder joint thickness between the conductive pillar and the conductive pad. The first height is about equal to a sum of the solder joint thickness and the second height.

A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.

A semiconductor device includes a first semiconductor chip including a conductive pad, an insulating layer provided on the conductive pad, and having an aperture exposing a part of the conductive pad, and a first bump layer provided on the insulating layer and connected to the conductive pad via the aperture, and a second semiconductor chip including an electrode and a second bump layer provided on the electrode. The first bump layer includes a recessed portion provided at the aperture and in contact with the second bump layer, and a raised portion provided adjacent the aperture and in contact with the second bump layer.

A semiconductor package includes a first substrate having a first surface and including a first electrode, a first bump pad located on the first surface of the first substrate and connected to the first electrode, a second substrate having a second surface facing the first surface of the first substrate and including a second electrode, a second bump pad and neighboring second bump pads on the second surface of the second substrate, and a bump structure. The second bump pad has a recess structure. That is recessed from a side surface of the second bump pad toward a center thereof. The second bump pad may be connected to the second electrode. A bump structure may contact the first bump pad and the second bump pad. The bump structure may have a portion protruding through the recess structure. The neighboring second bump pads may neighbor the second bump pad and include recess structures oriented in different directions.

Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package structure includes a pillar bump and an elongated solder bump bonded to the semiconductor die and the substrate. A height of the elongated solder bump is substantially equal to a height of the pillar bump. The elongated solder bump has a first width, at a first horizontal plane passing through an upper end of a sidewall surface of the elongated solder bump, and a second width, at a second horizontal plane passing through a midpoint of the sidewall surface. A ratio of the second width to the first width is in a range from about 0.5 to about 1.1.

A semiconductor structure includes a semiconductor substrate; a first pad and a second pad on a top surface of the semiconductor substrate; a circuit board including a polymeric pad and an active pad corresponding to the first pad and the second pad on the top surface of the semiconductor substrate respectively; a first bump disposed between the polymeric pad and the first pad; and a second bump disposed between the active pad and the second pad; wherein a first thickness of the polymeric pad is greater than a second thickness of the active pad. Further, a method of manufacturing the semiconductor structure is disclosed. The method includes providing a circuit board; and forming a polymeric pad and an active pad on a surface of the circuit board, wherein a first thickness of the polymeric pad is substantially greater than a second thickness of the active pad.

A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a second corner edge of the interposer chip. A die is bonded to the frontside of the interposer chip. At least one dam structure is formed on the corner area of the backside of the interposer chip. The dam structure includes an edge aligned to at least one the first corner edge and the second corner edge of the interposer chip.

The present disclosure relates to a semiconductor structure. The semiconductor structure includes a semiconductor unit, one or more bonding structures, and at least one supporter. The semiconductor unit includes at least one via. The one or more bonding structures are disposed over the semiconductor unit and electrically connected to the at least one via. The at least one supporter is disposed over the semiconductor unit. The at least one supporter is a metal block or a polymer block spaced apart from the one or more bonding structures.