Patent classifications
H01L2224/81207
INTEGRATED CIRCUIT PACKAGES TO MINIMIZE STRESS ON A SEMICONDUCTOR DIE
An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
INTEGRATED CIRCUIT PACKAGES TO MINIMIZE STRESS ON A SEMICONDUCTOR DIE
An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
WIRELESS COMMUNICATION TECHNOLOGY, APPARATUSES, AND METHODS
- Erkan Alpman ,
- Arnaud Lucres Amadjikpe ,
- Omer Asaf ,
- Kameran Azadet ,
- Rotem Banin ,
- Miroslav Baryakh ,
- Anat Bazov ,
- Stefano Brenna ,
- Bryan K. Casper ,
- Anandaroop Chakrabarti ,
- Gregory Chance ,
- Debabani CHOUDHURY ,
- Emanuel Cohen ,
- Claudio Da Silva ,
- Sidharth Dalmia ,
- Saeid Daneshgar Asi ,
- Kaushik Dasgupta ,
- Kunal Datta ,
- Brandon Davis ,
- Ofir Degani ,
- Amr M. Fahim ,
- Amit Freiman ,
- Michael Genossar ,
- Eran Gerson ,
- Eyal Goldberger ,
- Eshel Gordon ,
- Meir Gordon ,
- Josef Hagn ,
- Shinwon Kang ,
- Te Yu Kao ,
- Noam Kogan ,
- Mikko S. Komulainen ,
- Igal Yehuda Kushnir ,
- Saku Lahti ,
- Mikko M. Lampinen ,
- Naftali Landsberg ,
- Wook Bong Lee ,
- Run Levinger ,
- Albert Molina ,
- Resti Montoya Moreno ,
- Tawfiq Musah ,
- Nathan G. Narevsky ,
- Hosein Nikopour ,
- Oner Orhan ,
- Georgios Palaskas ,
- Stefano PELLERANO ,
- Ron Pongratz ,
- Ashoke Ravi ,
- Shmuel Ravid ,
- Peter Andrew Sagazio ,
- Eren Sasoglu ,
- Lior Shakedd ,
- Gadi Shor ,
- Baljit Singh ,
- Menashe Soffer ,
- Ra'anan Sover ,
- Shilpa Talwar ,
- Nebil Tanzi ,
- Moshe Teplitsky ,
- Chintan S. Thakkar ,
- Jayprakash Thakur ,
- Avi Tsarfati ,
- Yossi TSFATI ,
- Marian Verhelst ,
- Nir Weisman ,
- Shuhei Yamada ,
- Ana M. Yepes ,
- Duncan Kitchin
Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
WIRELESS COMMUNICATION TECHNOLOGY, APPARATUSES, AND METHODS
- Erkan Alpman ,
- Arnaud Lucres Amadjikpe ,
- Omer Asaf ,
- Kameran Azadet ,
- Rotem Banin ,
- Miroslav Baryakh ,
- Anat Bazov ,
- Stefano Brenna ,
- Bryan K. Casper ,
- Anandaroop Chakrabarti ,
- Gregory Chance ,
- Debabani CHOUDHURY ,
- Emanuel Cohen ,
- Claudio Da Silva ,
- Sidharth Dalmia ,
- Saeid Daneshgar Asi ,
- Kaushik Dasgupta ,
- Kunal Datta ,
- Brandon Davis ,
- Ofir Degani ,
- Amr M. Fahim ,
- Amit Freiman ,
- Michael Genossar ,
- Eran Gerson ,
- Eyal Goldberger ,
- Eshel Gordon ,
- Meir Gordon ,
- Josef Hagn ,
- Shinwon Kang ,
- Te Yu Kao ,
- Noam Kogan ,
- Mikko S. Komulainen ,
- Igal Yehuda Kushnir ,
- Saku Lahti ,
- Mikko M. Lampinen ,
- Naftali Landsberg ,
- Wook Bong Lee ,
- Run Levinger ,
- Albert Molina ,
- Resti Montoya Moreno ,
- Tawfiq Musah ,
- Nathan G. Narevsky ,
- Hosein Nikopour ,
- Oner Orhan ,
- Georgios Palaskas ,
- Stefano PELLERANO ,
- Ron Pongratz ,
- Ashoke Ravi ,
- Shmuel Ravid ,
- Peter Andrew Sagazio ,
- Eren Sasoglu ,
- Lior Shakedd ,
- Gadi Shor ,
- Baljit Singh ,
- Menashe Soffer ,
- Ra'anan Sover ,
- Shilpa Talwar ,
- Nebil Tanzi ,
- Moshe Teplitsky ,
- Chintan S. Thakkar ,
- Jayprakash Thakur ,
- Avi Tsarfati ,
- Yossi TSFATI ,
- Marian Verhelst ,
- Nir Weisman ,
- Shuhei Yamada ,
- Ana M. Yepes ,
- Duncan Kitchin
Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.
Integrated circuit bond pad with multi-material toothed structure
An integrated circuit device may include a multi-material toothed bond pad including (a) an array of vertically-extending teeth formed from a first material, e.g., aluminum, and (b) a fill material, e.g., silver, at least partially filling voids between the array of teeth. The teeth may be formed by depositing and etching aluminum or other suitable material, and the fill material may be deposited over the array of teeth and extending down into the voids between the teeth, and etched to expose top surfaces of the teeth. The array of teeth may collectively define an abrasive structure. The multi-material toothed bond pad may be bonded to another bond pad, e.g., using an ultrasonic or thermosonic bonding process, during which the abrasive teeth may abrade, break, or remove unwanted native oxide layers formed on the respective bond pad surfaces, to thereby create a direct and/or eutectic bonding between the bond pads.
Integrated circuit bond pad with multi-material toothed structure
An integrated circuit device may include a multi-material toothed bond pad including (a) an array of vertically-extending teeth formed from a first material, e.g., aluminum, and (b) a fill material, e.g., silver, at least partially filling voids between the array of teeth. The teeth may be formed by depositing and etching aluminum or other suitable material, and the fill material may be deposited over the array of teeth and extending down into the voids between the teeth, and etched to expose top surfaces of the teeth. The array of teeth may collectively define an abrasive structure. The multi-material toothed bond pad may be bonded to another bond pad, e.g., using an ultrasonic or thermosonic bonding process, during which the abrasive teeth may abrade, break, or remove unwanted native oxide layers formed on the respective bond pad surfaces, to thereby create a direct and/or eutectic bonding between the bond pads.
Encapsulation resin composition, laminated sheet, cured product, semiconductor device, and method for fabricating semiconductor device
An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160° C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40° C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50° C. than the reaction start temperature.
Encapsulation resin composition, laminated sheet, cured product, semiconductor device, and method for fabricating semiconductor device
An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160° C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40° C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50° C. than the reaction start temperature.
Surface mounted piezoelectric vibrator
A piezoelectric vibrator according to the invention has a base, an integrated circuit element, and a piezoelectric vibration element. The base has internal terminal pads, and external terminals including an AC output terminal. The base includes rectangular ceramic substrate layers stacked in at least three layers, each of which has castellations formed at four corners. Among the internal terminal pads, internal terminal pads for the integrated circuit element and internal terminal pads for the piezoelectric vibration element are connected to each other by externally exposed wiring patterns formed on upper surfaces of the castellations at the corners of the ceramic substrate constituting a middle layer.
Surface mounted piezoelectric vibrator
A piezoelectric vibrator according to the invention has a base, an integrated circuit element, and a piezoelectric vibration element. The base has internal terminal pads, and external terminals including an AC output terminal. The base includes rectangular ceramic substrate layers stacked in at least three layers, each of which has castellations formed at four corners. Among the internal terminal pads, internal terminal pads for the integrated circuit element and internal terminal pads for the piezoelectric vibration element are connected to each other by externally exposed wiring patterns formed on upper surfaces of the castellations at the corners of the ceramic substrate constituting a middle layer.