H01L2224/81207

MICROELECTRONIC PACKAGES WITH HIGH INTEGRATION MICROELECTRONIC DICE STACK
20210035950 · 2021-02-04 ·

A microelectronic package may include stacked microelectronic dice, wherein a first microelectronic die is attached to a microelectronic substrate, and a second microelectronic die is stacked over at least a portion of the first microelectronic die, wherein the microelectronic substrate includes a plurality of pillars extending therefrom, wherein the second microelectronic die includes a plurality of pillars extending therefrom in a mirror-image configuration to the plurality of microelectronic substrate pillars, and wherein the second microelectronic die pillars are attached to microelectronic substrate pillars with an attachment material.

METHOD OF MANUFACTURING A THIN SEMICONDUCTOR CHIP USING A DUMMY SIDEWALL LAYER AND A DEVICE THEREOF
20210020555 · 2021-01-21 ·

The present disclosure provides devices and methods in which a semiconductor chip has a reduced size and thickness. The device is manufactured by utilizing a sacrificial or dummy silicon wafer. A recess is formed in the dummy silicon wafer where the semiconductor chip is mounted in the recess. The space between the dummy silicon wafer and the chip is filled with underfill material. The dummy silicon wafer and the backside of the chip are etched using any suitable etching process until the dummy silicon wafer is removed, and the thickness of the chip is reduced. With this process, the overall thickness of the semiconductor chip can be thinned down to less than 50 m in some embodiments. The ultra-thin semiconductor chip can be incorporated in manufacturing flexible/rollable display panels, foldable mobile devices, wearable displays, or any other electrical or electronic devices.

METHOD OF MANUFACTURING A THIN SEMICONDUCTOR CHIP USING A DUMMY SIDEWALL LAYER AND A DEVICE THEREOF
20210020555 · 2021-01-21 ·

The present disclosure provides devices and methods in which a semiconductor chip has a reduced size and thickness. The device is manufactured by utilizing a sacrificial or dummy silicon wafer. A recess is formed in the dummy silicon wafer where the semiconductor chip is mounted in the recess. The space between the dummy silicon wafer and the chip is filled with underfill material. The dummy silicon wafer and the backside of the chip are etched using any suitable etching process until the dummy silicon wafer is removed, and the thickness of the chip is reduced. With this process, the overall thickness of the semiconductor chip can be thinned down to less than 50 m in some embodiments. The ultra-thin semiconductor chip can be incorporated in manufacturing flexible/rollable display panels, foldable mobile devices, wearable displays, or any other electrical or electronic devices.

Microelectronic packages with high integration microelectronic dice stack
10872881 · 2020-12-22 · ·

A microelectronic package may include stacked microelectronic dice, wherein a first microelectronic die is attached to a microelectronic substrate, and a second microelectronic die is stacked over at least a portion of the first microelectronic die, wherein the microelectronic substrate includes a plurality of pillars extending therefrom, wherein the second microelectronic die includes a plurality of pillars extending therefrom in a mirror-image configuration to the plurality of microelectronic substrate pillars, and wherein the second microelectronic die pillars are attached to microelectronic substrate pillars with an attachment material.

Microelectronic packages with high integration microelectronic dice stack
10872881 · 2020-12-22 · ·

A microelectronic package may include stacked microelectronic dice, wherein a first microelectronic die is attached to a microelectronic substrate, and a second microelectronic die is stacked over at least a portion of the first microelectronic die, wherein the microelectronic substrate includes a plurality of pillars extending therefrom, wherein the second microelectronic die includes a plurality of pillars extending therefrom in a mirror-image configuration to the plurality of microelectronic substrate pillars, and wherein the second microelectronic die pillars are attached to microelectronic substrate pillars with an attachment material.

VIBRATION HEAT-PRESSING DEVICE
20200384700 · 2020-12-10 ·

A vibration heat-pressing device includes a positioning member, a support body, a pressing mechanism, a vibration generator, and a heating rod. The positioning member supports and positions the workpiece. The pressing mechanism, the vibration generator, and the heating rod are located on the support body. The support body defines a first mounting hole. The heating rod is engaged in the first mounting hole. One end of the heating rod extends out from the support body and is connected to a heating device. The heating rod heats the heating rod of the pressing mechanism. A heat-conducting medium is filled in a gap between the heating rod and an inner wall of the first mounting hole. While the heating rod of the pressing mechanism are heated, the vibration generator vibrates the pressing mechanism.

ENCAPSULATION RESIN COMPOSITION, LAMINATED SHEET, CURED PRODUCT, SEMICONDUCTOR DEVICE, AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160 C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40 C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50 C. than the reaction start temperature.

ENCAPSULATION RESIN COMPOSITION, LAMINATED SHEET, CURED PRODUCT, SEMICONDUCTOR DEVICE, AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160 C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40 C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50 C. than the reaction start temperature.

SEMICONDUCTOR SUBSTRATE WITH INTEGRATED INDUCTIVE COMPONENT

In an integrated circuit (IC), a semiconductor substrate has a first side and an opposite second side. The second side has a trench. Circuitry is on the first side. An inductive structure is within the trench. The inductive structure is connected to the circuitry through vias in the semiconductor substrate. The semiconductor substrate is mounted on a package substrate. At least a portion of the inductive structure contacts the package substrate. The circuitry is coupled to the inductive structure through wires to the package substrate.

Mounting Method of a semiconductor device using a colored auxiliary joining agent

The purpose is, in mounting a semiconductor device onto a substrate, to make it easy to identify the remaining amount of an auxiliary joining agent, to stabilize the dispensing amount of the auxiliary joining agent, and to prevent a shortage of the auxiliary joining agent. Also for the purpose of efficient maintenance of a mounting machine, provided is an auxiliary joining agent adapted to aid joining of metals and prepared by dissolving a colorant in a solvent having a reducing property of removing an oxide film on a metal surface. The auxiliary joining agent is produced by a method including a step of mixing a solvent having a reducing property of removing an oxide film on a metal surface, and a colorant having a property of dissolving in the solvent.