H01L2224/81438

Display device
10847746 · 2020-11-24 · ·

A display device includes a flexible base layer including a first portion and a second portion disposed around the second portion; a display unit disposed on a first surface of the first portion and including a light emitting element; a driving circuit disposed on a first surface of the second portion and including a driving chip; a support member attached to a second surface of the first portion and a second surface of the second portion; and an adhesive member disposed between the flexible base layer and the support member, wherein the adhesive member includes a first adhesive member having a first elastic modulus and a second adhesive member having a second elastic modulus that is higher than the first elastic modulus, and the second adhesive member overlaps the driving circuit.

Display device
10847746 · 2020-11-24 · ·

A display device includes a flexible base layer including a first portion and a second portion disposed around the second portion; a display unit disposed on a first surface of the first portion and including a light emitting element; a driving circuit disposed on a first surface of the second portion and including a driving chip; a support member attached to a second surface of the first portion and a second surface of the second portion; and an adhesive member disposed between the flexible base layer and the support member, wherein the adhesive member includes a first adhesive member having a first elastic modulus and a second adhesive member having a second elastic modulus that is higher than the first elastic modulus, and the second adhesive member overlaps the driving circuit.

MICROELECTRONICS ASSEMBLY INCLUDING TOP AND BOTTOM PACKAGES IN STACKED CONFIGURATION WITH SHARED COOLING

An integrated circuit structure that includes a first integrated circuit package and a second integrated circuit package is described. The two packages can be stacked above, for example, a printed circuit board. The top package is inverted, such that a first die of that top package is facing a second die of the bottom package. A cooling arrangement is in a gap between the first and second integrated circuit packages, and is thermally coupled to the first and second die. The cooling arrangement is to transfer heat generated by a first die of the first integrated circuit package and a second die of the second integrated circuit package. In some cases, structures comprising electrically conductive material (e.g., metal) are encapsulated by a molding compound or insulator, and extend between a first substrate of the first integrated circuit package and a second substrate of the second integrated circuit package.

MICROELECTRONICS ASSEMBLY INCLUDING TOP AND BOTTOM PACKAGES IN STACKED CONFIGURATION WITH SHARED COOLING

An integrated circuit structure that includes a first integrated circuit package and a second integrated circuit package is described. The two packages can be stacked above, for example, a printed circuit board. The top package is inverted, such that a first die of that top package is facing a second die of the bottom package. A cooling arrangement is in a gap between the first and second integrated circuit packages, and is thermally coupled to the first and second die. The cooling arrangement is to transfer heat generated by a first die of the first integrated circuit package and a second die of the second integrated circuit package. In some cases, structures comprising electrically conductive material (e.g., metal) are encapsulated by a molding compound or insulator, and extend between a first substrate of the first integrated circuit package and a second substrate of the second integrated circuit package.

INTEGRATED CIRCUIT (IC) PACKAGE WITH SUBSTRATE HAVING VALIDATION CONNECTORS

Embodiments herein describe techniques for an IC package including a package substrate. The package substrate includes a set of validation connectors formed on a first side of the package substrate, a first set of functional connectors formed on the first side of the package substrate, and a second set of functional connectors formed on a second side of the package substrate opposite to the first side. A validation connector of the set of validation connectors is arranged to be coupled with a validation connector of an IC die placed above the first side of the package substrate. A first functional connector of the first set of functional connectors is arranged to be coupled with a functional connector of the IC die. A second functional connector of the second set of functional connectors is arranged to be coupled through the first functional connector to the functional connector of the IC die.

INTEGRATED CIRCUIT (IC) PACKAGE WITH SUBSTRATE HAVING VALIDATION CONNECTORS

Embodiments herein describe techniques for an IC package including a package substrate. The package substrate includes a set of validation connectors formed on a first side of the package substrate, a first set of functional connectors formed on the first side of the package substrate, and a second set of functional connectors formed on a second side of the package substrate opposite to the first side. A validation connector of the set of validation connectors is arranged to be coupled with a validation connector of an IC die placed above the first side of the package substrate. A first functional connector of the first set of functional connectors is arranged to be coupled with a functional connector of the IC die. A second functional connector of the second set of functional connectors is arranged to be coupled through the first functional connector to the functional connector of the IC die.

PLANAR INTEGRATED CIRCUIT PACKAGE INTERCONNECTS
20200235047 · 2020-07-23 ·

Generally discussed herein are systems, methods, and apparatuses that include conductive pillars that are about co-planar. According to an example, a technique can include growing conductive pillars on respective exposed landing pads of a substrate, situating molding material around and on the grown conductive pillars, removing, simultaneously, a portion of the grown conductive pillars and the molding material to make the grown conductive pillars and the molding material about planar, and electrically coupling a die to the conductive pillars.

PLANAR INTEGRATED CIRCUIT PACKAGE INTERCONNECTS
20200235047 · 2020-07-23 ·

Generally discussed herein are systems, methods, and apparatuses that include conductive pillars that are about co-planar. According to an example, a technique can include growing conductive pillars on respective exposed landing pads of a substrate, situating molding material around and on the grown conductive pillars, removing, simultaneously, a portion of the grown conductive pillars and the molding material to make the grown conductive pillars and the molding material about planar, and electrically coupling a die to the conductive pillars.

Planar integrated circuit package interconnects
10651116 · 2020-05-12 · ·

Generally discussed herein are systems, methods, and apparatuses that include conductive pillars that are about co-planar. According to an example, a technique can include growing conductive pillars on respective exposed landing pads of a substrate, situating molding material around and on the grown conductive pillars, removing, simultaneously, a portion of the grown conductive pillars and the molding material to make the grown conductive pillars and the molding material about planar, and electrically coupling a die to the conductive pillars.

Planar integrated circuit package interconnects
10651116 · 2020-05-12 · ·

Generally discussed herein are systems, methods, and apparatuses that include conductive pillars that are about co-planar. According to an example, a technique can include growing conductive pillars on respective exposed landing pads of a substrate, situating molding material around and on the grown conductive pillars, removing, simultaneously, a portion of the grown conductive pillars and the molding material to make the grown conductive pillars and the molding material about planar, and electrically coupling a die to the conductive pillars.