The semiconductor memory device includes: a first substrate including a peripheral circuit, first conductive contact patterns connected to the peripheral circuit, and a first upper insulating layer having grooves exposing the first conductive contact patterns; a second substrate including a memory cell array, a second upper insulating layer disposed on the memory cell array, the second upper insulating layer formed between the memory cell array and the first upper insulating layer, second conductive contact patterns protruding through the second upper insulating layer into an opening of the grooves; and conductive adhesive patterns filling the grooves to connect the second conductive contact patterns to the first conductive contact patterns.

The semiconductor memory device includes: a first substrate including a peripheral circuit, first conductive contact patterns connected to the peripheral circuit, and a first upper insulating layer having grooves exposing the first conductive contact patterns; a second substrate including a memory cell array, a second upper insulating layer disposed on the memory cell array, the second upper insulating layer formed between the memory cell array and the first upper insulating layer, second conductive contact patterns protruding through the second upper insulating layer into an opening of the grooves; and conductive adhesive patterns filling the grooves to connect the second conductive contact patterns to the first conductive contact patterns.

A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. The lower portion has a width is wider than of the upper portion.

A semiconductor device includes an array of flexible connectors configured to mitigate thermomechanical stresses. In one embodiment, a semiconductor assembly includes a substrate coupled to an array of flexible connectors. Each flexible connector can be transformed between a resting configuration and a loaded configuration. Each flexible connector includes a conductive wire electrically coupled to the substrate and a support material at least partially surrounding the conductive wire. The conductive wire has a first shape when the flexible connector is in the resting configuration and a second, different shape when the flexible connector is in the loaded configuration. The first shape includes at least two apices spaced apart from each other in a vertical dimension by a first distance, and the second shape includes the two apices spaced apart from each other in the vertical dimension by a second distance different than the first distance.

A semiconductor device includes an array of flexible connectors configured to mitigate thermomechanical stresses. In one embodiment, a semiconductor assembly includes a substrate coupled to an array of flexible connectors. Each flexible connector can be transformed between a resting configuration and a loaded configuration. Each flexible connector includes a conductive wire electrically coupled to the substrate and a support material at least partially surrounding the conductive wire. The conductive wire has a first shape when the flexible connector is in the resting configuration and a second, different shape when the flexible connector is in the loaded configuration. The first shape includes at least two apices spaced apart from each other in a vertical dimension by a first distance, and the second shape includes the two apices spaced apart from each other in the vertical dimension by a second distance different than the first distance.

The present invention relates to a method and apparatus for manufacturing a plurality of electronic circuits, each electronic circuit comprising a respective flexible first portion, comprising a respective group of contact pads (contacts), and a respective flexible integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad, the method comprising: providing (e.g. manufacturing) a flexible first structure comprising the plurality of first portions; providing (e.g. manufacturing) a second structure comprising the plurality of flexible ICs and a common support arranged to support the plurality of flexible ICs; dispensing an adhesive onto the first structure and/or onto the flexible ICs; transferring said flexible ICs from the common support onto the flexible first structure such that each group of terminals is mounted on (brought into electrical contact with) a respective group of contact pads to form an electronic circuit, providing a heated surface and an opposing surface together having a gap therebetween, transferring the flexible first structure, comprising the electronic circuits, between the heated surface and the opposing surface such that the adhesive is cured by application of heat and pressure from the heated surface and the opposing surface thereby adhering the IC onto the respective first portion.

The present invention relates to a method and apparatus for manufacturing a plurality of electronic circuits, each electronic circuit comprising a respective flexible first portion, comprising a respective group of contact pads (contacts), and a respective flexible integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad, the method comprising: providing (e.g. manufacturing) a flexible first structure comprising the plurality of first portions; providing (e.g. manufacturing) a second structure comprising the plurality of flexible ICs and a common support arranged to support the plurality of flexible ICs; dispensing an adhesive onto the first structure and/or onto the flexible ICs; transferring said flexible ICs from the common support onto the flexible first structure such that each group of terminals is mounted on (brought into electrical contact with) a respective group of contact pads to form an electronic circuit, providing a heated surface and an opposing surface together having a gap therebetween, transferring the flexible first structure, comprising the electronic circuits, between the heated surface and the opposing surface such that the adhesive is cured by application of heat and pressure from the heated surface and the opposing surface thereby adhering the IC onto the respective first portion.

A method of manufacturing a semiconductor memory device includes processing a first substrate including a first align mark and a first structure, processing a second substrate including a second align mark and a second structure, orientating the first substrate and the second substrate such that the first structure and the second structure face each other, and controlling alignment between the first structure and the second structure by using the first align mark and the second align mark to couple the first structure with the second structure.

A printed structure comprises a device comprising device electrical contacts disposed on a common side of the device and a substrate non-native to the device comprising substrate electrical contacts disposed on a surface of the substrate. At least one of the substrate electrical contacts has a rounded shape. The device electrical contacts are in physical and electrical contact with corresponding substrate electrical contacts. The substrate electrical contacts can comprise a polymer core coated with a patterned contact electrical conductor on a surface of the polymer core. A method of making polymer cores comprising patterning a polymer on the substrate and reflowing the patterned polymer to form one or more rounded shapes of the polymer and coating and then patterning the one or more rounded shapes with a conductive material.

A printed structure comprises a device comprising device electrical contacts disposed on a common side of the device and a substrate non-native to the device comprising substrate electrical contacts disposed on a surface of the substrate. At least one of the substrate electrical contacts has a rounded shape. The device electrical contacts are in physical and electrical contact with corresponding substrate electrical contacts. The substrate electrical contacts can comprise a polymer core coated with a patterned contact electrical conductor on a surface of the polymer core. A method of making polymer cores comprising patterning a polymer on the substrate and reflowing the patterned polymer to form one or more rounded shapes of the polymer and coating and then patterning the one or more rounded shapes with a conductive material.