Patent classifications
H01L2224/85123
Methods for generating wire loop profiles for wire loops, and methods for checking for adequate clearance between adjacent wire loops
A method of generating a wire loop profile in connection with a semiconductor package is provided. The method includes the steps of: (a) providing package data related to the semiconductor package; and (b) creating a loop profile of a wire loop of the semiconductor package, the loop profile including a tolerance band along at least a portion of a length of the wire loop.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes a semiconductor element having a substrate with at least two bending portions formed on a first side surface thereof. The two bending portions are displaced from each other in a first direction that is perpendicular to the first side surface of the substrate and parallel to a front surface of the substrate and in a second direction parallel to the front surface of the substrate and perpendicular to a top surface of the substrate. A rearmost portion of the first side surface is substantially perpendicular to the front surface.
METHODS FOR GENERATING WIRE LOOP PROFILES FOR WIRE LOOPS, AND METHODS FOR CHECKING FOR ADEQUATE CLEARANCE BETWEEN ADJACENT WIRE LOOPS
A method of generating a wire loop profile in connection with a semiconductor package is provided. The method includes the steps of: (a) providing package data related to the semiconductor package; and (b) creating a loop profile of a wire loop of the semiconductor package, the loop profile including a tolerance band along at least a portion of a length of the wire loop.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes, after a wire bonding step, a step of determining a quality as to whether or not a whole of an end portion of a wire is located within a bonding region. A semiconductor chip includes a plurality of position determining opening patterns arranged in a region located around a main opening portion including the bonding region in plan view. The bonding region has a rectangular shape having an area smaller than an opening area of the main opening portion in plan view. The bonding region is defined by the plurality of position determining opening patterns.
Manufacturing apparatus and manufacturing method of semiconductor device
A wire bonding apparatus includes: a capillary, performing predetermined processing on a workpiece and movable with respect to the workpiece; an optical mechanism, moving together with the capillary; and a controller. The optical mechanism includes: a first imaging unit, acquiring a first image obtained by imaging a standard point set within an imaging range; and a second imaging unit, acquiring a second image obtained by imaging a reference point formed at a predetermined distance from the capillary. The controller positions the capillary with respect to the workpiece based on the first image, and calculates a positioning correction amount of the capillary based on the second image.