Semiconductor devices including stacked semiconductor dies and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die coupled to a package substrate and a second semiconductor die stacked over the first semiconductor die and laterally offset from the first semiconductor die. The second semiconductor die can accordingly include an overhang portion that extends beyond a side of the first semiconductor die and faces the package substrate. In some embodiments, the second semiconductor die includes bond pads at the overhang portion that are electrically coupled to the package substrate via conductive features disposed therebetween. In certain embodiments, the first semiconductor die can include second bond pads electrically coupled to the package substrate via wire bonds.

An apparatus comprising: a die stack comprising at least one die pair, the at least one die pair having a first die over a second die, the first die and the second die both having a first surface and a second surface, the second surface of the first die over the first surface of the second die; and an adhesive film between the first die and the second die of the at least one die pair; wherein the adhesive film comprises an insulating layer and a conductive layer, the insulating layer adhering to the second surface of the first die and the conductive layer adhering to the first surface of the second die.

A measuring device includes two sensor chips that measure a flow rate of a fluid flowing through a pipe, electrode pads extending from a temperature measuring section and from a heater, respectively, toward peripheries of the two sensor chips, and wires that are electrically connected to the electrode pads and via which a measurement signal that is output from the temperature measuring section or the heater is transmitted to outside of the sensor chips. Each of the electrode pads includes a straight portion that extends linearly from the temperature measuring section or the heater and a wide portion that is formed at a leading end of each of the electrode pads and is wider than the straight portion, and an entire surface area of the wide portion is set as a wire-bonding-allowed region, to which one of the wires is to be bonded.

A semiconductor device may include a first semiconductor module and a second semiconductor module. The first semiconductor module may include a first semiconductor element, a first encapsulant encapsulating the first semiconductor element and first and second power terminals electrically connected with the first semiconductor element within the first encapsulant and extending to outside of the first encapsulant. The second semiconductor module may include a second semiconductor element, a second encapsulant encapsulating the second semiconductor element, and third and fourth power terminals electrically connected with the second semiconductor element within the second encapsulant and extending to outside of the second encapsulant. Outside the first and second encapsulants, the first and fourth power terminals may extend to be opposed to each other, and the second and third power terminals may extend to be opposed to each other.

A semiconductor package includes a package substrate, a semiconductor chip on the package substrate, a transparent substrate on the semiconductor chip, a dam structure between the semiconductor chip and the transparent substrate, a dummy pad on a lower side of the dam structure and to which no wiring is connected, a planarization film extending along an upper surface of the semiconductor chip and a passivation film on the planarization film, wherein the planarization film is spaced apart from the dam structure.

A semiconductor package including a package base substrate; at least one semiconductor chip on the package base substrate; a heat sink attached on the at least one semiconductor chip, the heat sink including a base and a plurality of protrusion patterns on a top of the base; and a molding covering a top of the package base substrate, a side surface of the at least one semiconductor chip, and a side surface of the heat sink without covering a top of the heat sink.

A semiconductor package including a package base substrate; at least one semiconductor chip on the package base substrate; a heat sink attached on the at least one semiconductor chip, the heat sink including a base and a plurality of protrusion patterns on a top of the base; and a molding covering a top of the package base substrate, a side surface of the at least one semiconductor chip, and a side surface of the heat sink without covering a top of the heat sink.

An electronic package is provided, in which a first shielding part bonded with a first electronic component are disposed on a carrier structure, and the first electronic component and the first shielding part are covered by an encapsulation layer. The first shielding part includes a semiconductor block and a magnetized layer formed on the semiconductor block, and the first shielding part is bonded to the first electronic component, such that the semiconductor block separates the magnetized layer and the first electronic component. Therefore, a distance defined by a thickness of a single semiconductor block is maintained between the magnetized layer and the first electronic component, thereby preventing a magnetic field operation of the first electronic component from being interfered by a magnetic field of the magnetized layer.

Semiconductor devices including stacked semiconductor dies and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die coupled to a package substrate and a second semiconductor die stacked over the first semiconductor die and laterally offset from the first semiconductor die. The second semiconductor die can accordingly include an overhang portion that extends beyond a side of the first semiconductor die and faces the package substrate. In some embodiments, the second semiconductor die includes bond pads at the overhang portion that are electrically coupled to the package substrate via conductive features disposed therebetween. In certain embodiments, the first semiconductor die can include second bond pads electrically coupled to the package substrate via wire bonds.

An image sensor package according to an embodiment of the present technology includes: a solid-state image sensor; a transparent substrate; and a package substrate. The solid-state image sensor has a light-receiving surface including a light-reception unit and a first terminal unit, and a rear surface opposite to the light-receiving surface. The transparent substrate faces the light-receiving surface. The package substrate includes a frame portion, a second terminal unit, and a supporting body. The frame portion has a joint surface to be joined to the transparent substrate and includes a housing portion housing the solid-state image sensor. The second terminal unit is to be wire-bonded to the first terminal unit, the second terminal unit being provided in the frame portion. The supporting body is provided in a peripheral portion of the light-receiving surface or at a center portion of the rear surface and partially supports the light-receiving surface or the rear surface.