A multi-chip module structure (MCM) having improved heat dissipation includes a plurality of semiconductor chips having a front side mounted on a packaging substrate, wherein each semiconductor chip of the plurality of semiconductor chips further includes a through-substrate vias located at a backside of each semiconductor chip of the plurality of semiconductor chips. A plurality of wire bonds is present that provides interconnect between each semiconductor chip of the plurality of semiconductor chips and is located at the backside of each semiconductor chip of the plurality of semiconductor chips. A heat sink is located above a gap containing the plurality of wire bonds, and a cooling element is located on a surface of the heat sink.

A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.

A semiconductor device having an EMI shield layer and/or EMI shielding wires, and a manufacturing method thereof, are provided. In an example embodiment, the semiconductor device includes a semiconductor die, an EMI shield layer shielding the semiconductor die, and an encapsulating portion encapsulating the EMI shield layer. In another example embodiment, the semiconductor device further includes EMI shielding wires extending from the EMI shield layer and shielding the semiconductor die.

Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

The invention relates to a multilayer semiconductor integrated circuit device which is provided with a smaller space for a three-dimensional multilayer configuration at a lower cost and with a sufficient power supply quality. A first semiconductor integrated circuit device is provided with a first penetrating semiconductor region that penetrates through the first semiconductor body in the thickness direction and that is connected to the first power supply potential, and a second penetrating semiconductor region that penetrates through the first semiconductor body in the thickness direction and that is connected to the second power supply potential. A second semiconductor integrated circuit device having a first electrode and a second electrode is layered on top of the first semiconductor integrated circuit device so that the first electrode and the second electrode are respectively connected to the first penetrating semiconductor region and the second penetrating semiconductor region.

A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.

Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

Integrated circuit packaging with cavities and methods of manufacturing the same are disclosed. An example apparatus includes a semiconductor die and a housing enclosing portions of the semiconductor die. The housing defines an opening that extends from a surface of the semiconductor die to an external environment, the housing formed of a first material. The example apparatus includes a second material disposed within the opening to block exposure of the semiconductor die to the external environment.

Disclosed in the present application are a camera module, and a photosensitive assembly and a manufacturing method therefor. The photosensitive assembly comprises a circuit board, a photosensitive chip electrically connected to the circuit board, and a shaping member provided on the circuit board. A lower surface of the photosensitive chip is attached to the shaping member to form an accommodating space with the shaping member and the circuit board. The accommodating space is configured so that the photosensitive chip is bent downward during a process of assembling the photosensitive assembly. In this way, the photosensitive chip is bent into a shape adapted to the actual focal plane during the assembly process, so as to improve the imaging quality.

A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.