Patent classifications
H01L2924/1421
Electronic Package with Components Mounted at Two Sides of a Layer Stack
A method includes forming a layer stack with at least one electrically insulating layer structure and at least one patterned electrically conductive layer structure on a temporary carrier, the layer stack includes a lower surface adjoining the temporary carrier and an upper surface opposite to the lower surface; mounting a first component at the upper surface; placing a first frame structure at the upper surface, the first frame structure surrounding at least partially the first component; covering the first component with a first coating material, the first coating material spatially extending at least partially into voids at or within the first frame structure and into voids at or within the layer stack; and removing the temporary carrier. The lower surface of the layer stack is an even surface. The opposite upper surface of the layer stack is an uneven surface. An electronic package can be manufactured with the described method.
SEMICONDUCTOR DIE EMPLOYING REPURPOSED SEED LAYER FOR FORMING ADDITIONAL SIGNAL PATHS TO BACK END-OF-LINE (BEOL) STRUCTURE, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS
A semiconductor die (“die”) employing repurposed seed layer for forming additional signal paths to a back end-of-line (BEOL) structure of the die, and related integrated circuit (IC) packages and fabrication methods. A seed layer is repurposed that was disposed adjacent the BEOL interconnect structure to couple an under bump metallization (UBM) interconnect without a coupled interconnect bump thus forming an unraised interconnect bump, to a UBM interconnect that has a raised interconnect bump. To couple the unraised interconnect bump to the raised interconnect bump, the seed layer is selectively removed during fabrication to leave a portion of the seed layer repurposed that couples the UBM interconnect that does not have an interconnect bump to the UBM interconnect that has a raised interconnect bump. Additional routing paths can be provided between raised interconnect bumps to the BEOL interconnect structure through coupling of UBM interconnects to an unraised interconnect bump.
Microelectronic package with radio frequency (RF) chiplet
Embodiments may relate to a microelectronic package that includes a radio frequency (RF) chip coupled with a die by interconnects with a first pitch. The RF chip may further be coupled with a waveguide of a package substrate by interconnects with a second pitch that is different than the first pitch. The RF chip may facilitate conveyance of data to the waveguide as an electromagnetic signal with a frequency greater than approximately 20 gigahertz (GHz). Other embodiments may be described or claimed.
METAL PILLAR CONNECTION TOPOLOGIES FOR HETEROGENEOUS PACKAGING
A radio frequency (“RF”) transistor amplifier die includes a semiconductor layer structure having a plurality of transistor cells, and an insulating layer on a surface of the semiconductor layer structure. Conductive pillar structures protrude from the insulating layer opposite the surface of the semiconductor layer structure, and are configured to provide input signal, output signal, or ground connections to the transistor cells. The ground connections are arranged between the input and/or output signal connections to the transistor cells. Related devices and packages are also discussed.
Radio frequency module
A radio frequency module in which the loop shape of a wire can be stable by disposing a protruding electrode at a bonding ending-point portion when a bonding wire forms a shield between components is provided. A radio frequency module includes a multilayer wiring board, components to mounted on an upper surface of the multilayer wiring board, a shield member formed of a plurality of bonding wires to cover the component, and a protruding electrode provided at a bonding ending-point portion of each of the bonding wires. Since the protruding electrode is provided at the bonding ending-point portion of each of the bonding wires, undesired bending can be prevented on a second bond side of the bonding wire. The shield member to cover side surfaces and a top surface of the component can be easily formed.
Coaxial through via with novel high isolation cross coupling method for 3D integrated circuits
A semiconductor package includes a first semiconductor device, a second semiconductor device vertically positioned above the first semiconductor device, and a ground shielded transmission path. The ground shielded transmission path couples the first semiconductor device to the second semiconductor device. The ground shielded transmission path includes a first signal path extending longitudinally between a first end and a second end. The first signal path includes a conductive material. A first insulating layer is disposed over the signal path longitudinally between the first end and the second end. The first insulating layer includes an electrically insulating material. A ground shielding layer is disposed over the insulating material longitudinally between the first end and the second end of the signal path. The ground shielding layer includes a conductive material coupled to ground. The ground shielding layer drives radiation signals received therein to ground to prevent induced noise in the first signal path.
Antenna in package structure and manufacturing method therefor
In an antenna in package structure, a plurality of supporting blocks spaced apart from each other are disposed between a first substrate and a second substrate, and an antenna cavity is formed between every two adjacent supporting blocks. Therefore, a height of the supporting block determines a height of the antenna cavity. The supporting blocks spaced apart from each other are located between the first substrate and the second substrate, and at least one of the first substrate or the second substrate adheres to the supporting blocks spaced apart from each other using an adhesive layer.
Antenna-in-package device with chip embedding technologies
A semiconductor device includes: a dielectric substrate; an integrated circuit (IC) die disposed inside an opening of the dielectric substrate, where the IC die is configured to transmit or receive radio frequency (RF) signals; a dielectric material in the opening of the dielectric substrate and around the IC die; a redistribution structure along a first side of the dielectric substrate, where a first conductive feature of the redistribution structure is electrically coupled to the IC die; a second conductive feature along a second side of the dielectric substrate opposing the first side; a via extending through the dielectric substrate, where the via electrically couples the first conductive feature and the second conductive feature; and an antenna at the second side of the dielectric substrate, where the second conductive feature is electrically or electromagnetically coupled to the antenna.
Power amplifier circuit and semiconductor device
A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor disposed on the semiconductor substrate and configured to supply a bias current based on a first current which is a part of a control current to the first transistor; a third transistor disposed on the semiconductor substrate and having a collector configured to be supplied with a second current which is a part of the control current and an emitter configured to output a third current based on the second current; a first bump electrically connected to an emitter of the first transistor and disposed so as to overlap a first disposition area in which the first transistor is disposed in plan view of the semiconductor substrate; and a second bump disposed so as to overlap a second disposition area in which the third transistor is disposed in the plan view.
MICRO DEVICE TRANSFER HEAD ASSEMBLY
A method of transferring a micro device and an array of micro devices are disclosed. A carrier substrate carrying a micro device connected to a bonding layer is heated to a temperature below a liquidus temperature of the bonding layer, and a transfer head is heated to a temperature above the liquidus temperature of the bonding layer. Upon contacting the micro device with the transfer head, the heat from the transfer head transfers into the bonding layer to at least partially melt the bonding layer. A voltage applied to the transfer head creates a grip force which picks up the micro device from the carrier substrate.