A semiconductor device is provided with a substrate made of a semiconductor material, an interconnect layer, at least one electronic element, and a sealing resin. The substrate has a main surface and a pair of lateral surfaces that are orthogonal to the main surface and face in opposite directions to each other. A recessed portion that is recessed from the main surface and has an opening portion that opens on at least one of the pair of lateral surfaces is formed in the substrate. The interconnect layer is formed on the substrate. The electronic element is an orientation sensor, for example, and is accommodated in the recessed portion of the substrate. The sealing resin covers the electronic element.

A semiconductor module includes: a substrate having an insulating layer and a connecting portion connecting front and rear surfaces of the insulating layer; a first pattern on a front surface of the substrate; a second pattern on a rear surface of the substrate; a first semiconductor device disposed adjacent to the front surface of the substrate and including a first switching device having a lateral structure; a second semiconductor device disposed adjacent to the rear surface of the substrate and including a second switching device having the lateral structure; and a capacitor. A path formed by the first pattern and the first semiconductor device and a path formed by the second pattern and the second semiconductor device are opposed to each other across the substrate, and in the paths, currents flow in directions opposite to each other.

An electronic device includes a first interposer, a first integrated circuit (IC) device affixed to the first interposer, a second interposer, and a second IC device affixed to the second interposer. he second interposer is bonded to the first interposer. The first interposer includes first interposer circuitry and a first connection element electrically connected to the first interposer circuitry. The second interposer includes second interposer circuitry and a second connection element electrically connected to the second interposer circuitry. The second connection element is bonded to the first connection element to define a connection element pair. The connection element pair provides an electrical connection between the first interposer circuitry and the second interposer circuitry.

Wireless modules having a semiconductor package attached to an antenna package is disclosed. The semiconductor package may house one or more electronic components as a single die package and/or a system in a package (SiP) implementation. The antenna package may be communicatively coupled to the semiconductor package using by one or more coupling pads. The antenna package may further have one or more radiating elements for transmitting and or receiving wireless signals. The antenna package and the semiconductor package may have dissimilar number of interconnect layers and/or dissimilar materials of construct.

A chip system includes a chip package body and an electromagnetic shielding enclosure. The chip package body is electrically connected to a circuit board through a first connection part. The chip package body includes a package substrate and at least one chip that are electrically connected. The electromagnetic shielding enclosure includes a conductive first shielding structure and a conductive second shielding structure. The first shielding structure is connected to the package substrate. A first cavity included in the first shielding structure is configured to accommodate at least one chip. A first end of the second shielding structure is connected to the circuit board or a solder pad of the circuit board; or a second end of the second shielding structure is connected to the first shielding structure to form a second cavity.

A semiconductor module includes: a substrate having an insulating layer and a connecting portion connecting front and rear surfaces of the insulating layer; a first pattern on a front surface of the substrate; a second pattern on a rear surface of the substrate; a first semiconductor device disposed adjacent to the front surface of the substrate and including a first switching device having a lateral structure; a second semiconductor device disposed adjacent to the rear surface of the substrate and including a second switching device having the lateral structure; and a capacitor. A path formed by the first pattern and the first semiconductor device and a path formed by the second pattern and the second semiconductor device are opposed to each other across the substrate, and in the paths, currents flow in directions opposite to each other.

A tag board includes an insulation substrate with a lower surface bonded to the outside and an upper surface including a recess, an upper surface conductor on the upper surface of the insulation substrate, a ground conductor on the lower surface of the insulation substrate, and a short-circuit-portion through conductor that penetrates the insulation substrate in the thickness direction and electrically connects the upper surface conductor and the ground conductor to each other. The short-circuit-portion through conductor is connected to the upper surface conductor only at a part of the periphery of the upper surface conductor.

A display device including: a substrate including a display area and a non-display area; a first pad terminal and a second pad terminal disposed in the non-display area, the first pad terminal arranged along a first row and the second pad terminal arranged along a second row; a first connection unit connected to the first pad terminal; a first driving integrated circuit connected to the first connection unit; a second connection unit connected to the second pad terminal; and a second driving integrated circuit connected to the second connection unit, wherein first connection unit is disposed overlapping the second connection unit.

A semiconductor device is provided with a substrate made of a semiconductor material, an interconnect layer, at least one electronic element, and a sealing resin. The substrate has a main surface and a pair of lateral surfaces that are orthogonal to the main surface and face in opposite directions to each other. A recessed portion that is recessed from the main surface and has an opening portion that opens on at least one of the pair of lateral surfaces is formed in the substrate. The interconnect layer is formed on the substrate. The electronic element is an orientation sensor, for example, and is accommodated in the recessed portion of the substrate. The sealing resin covers the electronic element.

A semiconductor integrated circuit chip, in which multi-core processors are integrated, is usually mounted over an organic wiring board by FC bonding to form a BGA package by being integrated with the substrate. In such a structure, power consumption is increased, and hence the power supplied only from a peripheral portion of the chip is insufficient, so that a power supply pad is also provided in the chip central portion. However, because of an increase in the wiring associated with the integration of a plurality of CPU cores, etc., there occurs a portion between the peripheral portion and the central portion of the chip, where a power supply pad cannot be arranged. According to the outline of the present application, in a semiconductor integrated circuit device such as a BGA, etc., in which a semiconductor chip is mounted over an interposer, such as a multilayer organic wiring board, in a face-up manner, a first group of metal through electrodes, which are provided in the semiconductor chip to supply a power supply potential to a core circuit, etc., and a first metal land over the interposer are interconnected by a first conductive adhesive member film.