A semiconductor structure includes a substrate including a first surface, a second surface opposite to the first surface, a first sidewall substantially orthogonal to the first surface and the second surface; an isolation layer surrounding and contacted with the first sidewall of the substrate; a die disposed over the second surface of the substrate; a first conductive bump disposed at the first surface of the substrate; and a second conductive bump disposed between the substrate and the die.

Disclosed is an electromagnetic wave absorbing heat conductive sheet having superior heat conductivity and electromagnetic wave absorbency. The electromagnetic wave absorbing heat conductive sheet comprises a polymer matrix component; a magnetic metal power; and a fibrous heat conductive filler oriented in one direction.

A thermal conducting sheet including: a binder resin; carbon fibers; and a thermal conducting filler other than the carbon fibers, wherein a mass ratio (carbon fibers/binder resin) of the carbon fibers to the binder resin is less than 1.30, wherein an amount of the thermal conducting filler is from 48% by volume through 70% by volume, and wherein the carbon fibers are oriented in a thickness direction of the thermal conducting sheet.

A semiconductor package includes a thermal interface material layer located on semiconductor chips located on a surface of a substrate, and a curved surface type heat spreader on the thermal interface material layer, including a curved surface region including a curved surface in which a surface has an inflection point corresponding to a vicinity region between the semiconductor chips.

A packaged integrated circuit and method of forming the same. The package integrated circuit includes an integrated circuit formed on a semiconductor die affixed to a surface of a multi-layer substrate, and a switch-mode regulator formed on the semiconductor die (or another semiconductor die) affixed to the surface of the multi-layer substrate. The integrated circuit and the switch-mode regulator are integrated within a package to form the packaged integrated circuit.

A packaged integrated circuit and method of forming the same. The package integrated circuit includes an integrated circuit formed on a semiconductor die affixed to a surface of a multi-layer substrate, and a switch-mode regulator formed on the semiconductor die (or another semiconductor die) affixed to the surface of the multi-layer substrate. The integrated circuit and the switch-mode regulator are integrated within a package to form the packaged integrated circuit.

A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first plurality of device dies bonded to one of the second plurality of device dies. The wafer is then sawed to form a die stack, wherein the die stack includes a first device die from the first plurality of device dies and a second device die from the second plurality of device dies. The method further includes bonding the die stack over a package substrate.

An electronic module 1 includes an electronic module 10 that includes a substrate 11 and an electronic element 12, an electronic module 20 that includes a substrate 21 arranged such that the principal surface 21a faces the principal surface 11a, an electronic element 22 electrically connected to the electronic element 12 with a connecting member 18 therebetween, and an electronic element 23 electrically connected to the electronic element 12 with a connecting member 19 therebetween passing through the substrate 21 in a thickness direction, the electronic module 20 thermally connected to the electronic module 10 by the connecting members 18 and 19, and a heat sink 30 that includes a housing part 31a therein and houses the electronic modules 10 and 20 in the housing part 31a such that the principal surface 11b is in contact with an inner wall surface of the housing part 31a.

A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first plurality of device dies bonded to one of the second plurality of device dies. The wafer is then sawed to form a die stack, wherein the die stack includes a first device die from the first plurality of device dies and a second device die from the second plurality of device dies. The method further includes bonding the die stack over a package substrate.

A semiconductor structure includes: a substrate; a package attached to a first surface of the substrate, where the package includes: an interposer, where a first side of the interposer is bonded to the first surface of the substrate through first conductive bumps; dies attached to a second side of the interposer opposing the first side; and a molding material on the second side of the interposer around the dies; a plurality of thermal interface material (TIM) films on a first surface of the package distal from the substrate, where each of the TIM films is disposed directly over at least one respective die of the dies; and a heat-dissipation lid attached to the first surface of the substrate, where the package and the plurality of TIM films are disposed in an enclosed space between the heat-dissipation lid and the substrate, where the heat-dissipation lid contacts the plurality of TIM films.