H02M3/076

DC-DC converter for a low voltage power source

The invention relates to a DC-DC converter (1) for a power source (2) generating extremely low voltage, the converter (1) operating in discontinuous mode, wherein the converter (1) comprises a self-oscillating charge pump (3a) having an array of interconnected ring oscillators (RO1-RON) for successively stepping up an input voltage (Vin) so as to result in the accumulated voltage (XN) at the last ring oscillator (RON), an amplifier (3b) and a pulse signal generator (3c) that generates a pulse signal that actuates a switch (11) so that the stepped-up, output voltage may be provided via a diode (12). The invention further relates to a method for actuating the DC-DC converter (1) for a power source (2) generating extremely low voltage.

CHARGE PUMP
20210159785 · 2021-05-27 · ·

A charge pump generates an output voltage. A first circuit generates a pulse width-modulated signal as a function of a deviation between the output voltage and a setpoint voltage. A second circuit receives a periodic signal and conditions the supply of the periodic signal to a control input of the charge pump as a function of the state of the pulse width-modulated signal.

Charge pump circuit configured for positive and negative voltage generation
11031865 · 2021-06-08 · ·

A charge pump includes an intermediate node capacitively coupled to receive a first clock signal oscillating between a ground and positive supply voltage, the intermediate node generating a first signal oscillating between a first and second voltage. A level shifting circuit shifts the first signal in response to a second clock signal to generate a second signal oscillating between first and third voltages. A CMOS switching circuit includes a first transistor having a source coupled to an input, a second transistor having a source coupled to an output and a gate coupled to receive the second signal. A common drain of the CMOS switching circuit is capacitively coupled to receive the first clock signal. When positively pumping, the first voltage is twice the second voltage and the third voltage is ground. When negatively pumping, the first and third voltages are of opposite polarity and the second voltage is ground.

Charge pump circuit with internal pre-charge configuration

A charge pump circuit includes a charge pump configured to increase a voltage of an input signal to generate a voltage-boosted input signal, output the voltage-boosted input signal in response to a determination that the voltage-boosted input signal is greater than or equal to a threshold, and connect the charge pump to a supply voltage to pre-charge the charge pump in response to a determination that the voltage-boosted input signal is less than the threshold. The charge pump circuit includes bandgap reference generator configured to receive the voltage-boosted input signal and output, based on the voltage-boosted input signal, a voltage reference signal to a device that operates in accordance with the supply voltage.

Bootstrap circuit and a sampling circuit using the same

A bootstrap circuit including: a charge pump; a power unit including a bootstrap capacitor, wherein the bootstrap capacitor is charged using an output voltage of the charge pump; and a switch driver for generating a bootstrap signal based on a clock signal and an analog signal, wherein the analog signal is input to an analog switch, the switch driver for controlling the analog switch using the bootstrap signal, and including a first body switch connected between an input terminal and a body of the analog switch.

Charge pump with load driven clock frequency management

A circuit includes a current controlled oscillator (CCO), and a charge pump circuit boosting a supply voltage to produce a charge pump output voltage at a charge pump output node in response to output from the CCO. A current sensing circuit includes a first resistor coupled between the charge pump output node and an output node, a first transistor having a first conduction terminal coupled to the charge pump output node through a second resistor, and a second conduction terminal coupled to an input of the CCO. A second transistor has a first conduction terminal coupled to the output node, a second conduction terminal coupled to a reference current source, and a control terminal coupled to the control terminal of the first transistor and to the second conduction terminal of the second transistor.

Method and circuits to provide higher supply voltage for analog components from lower supply voltages
10983543 · 2021-04-20 · ·

A mixed-signal integrated circuit (IC), including: a voltage booster that includes one or more charge pump devices configured to receive an input voltage, an oscillator signal, and a control signal, wherein the one or more charge pump devices comprise a network of capacitors switchable to provide a charged pumped in response to the control signal, and wherein the one or more charge pump devices, using the pumped, generate a boosted voltage based on the input voltage and at least a portion of an amplitude of the oscillator signal, a voltage regulator coupled to the one or more charge pump devices and configured to receive the boosted voltage and generate a regulated boosted voltage based on the boosted voltage, and a control and monitoring engine configured to provide the control signal based on, at least in part, the input voltage, the oscillator signal, and the regulated boosted voltage.

Differential clock level translator for charge pumps
11011981 · 2021-05-18 · ·

Circuits and methods for improved clock signal level shifting in charge pumps that avoids shoot-through current and loss due to simultaneous switching, which may be powered by V.sub.IN or any available level of V.sub.DD, and which provides a high level of clock signal voltage swing. Embodiments include a non-overlapping clock generator that generates a set of separate non-overlapping clock signals that are applied to a differential clock level translator coupled to a charge pump. The differential clock level translator level shifts the set of non-overlapping clock signals to a set of level-shifted non-overlapping clock signals. The charge pump is configured to receive the sets of non-overlapping clock signals and apply them to corresponding NMOS and PMOS switches. The set of level-shifted non-overlapping clock signals have shifted voltages sufficient to switch corresponding switches having elevated source voltages V.sub.S. The charge pump may be a differential charge pump in some embodiments.

POWER CONVERTOR
20210044201 · 2021-02-11 ·

A power supply circuit comprises a push-pull portion that includes a transformer (T1) having a primary winding with first and second terminals connected to ground via a first and second switches respectively. The push-pull portion generates an output voltage (V.sub.out) across the secondary winding. An inductor (L1) is connected between an input voltage (V.sub.in) and a centre tap on the primary winding of the transformer (T1) such that a boost voltage (V.sub.boost) is applied to the centre tap. A two input charge pump has its two inputs connected to the first and second terminals of the primary winding. The charge pump generates a charging voltage (V.sub.rect) at its output terminal that is greater than the boost voltage (V.sub.boost). An energy storage portion is connected to the output of the charge pump and is arranged to supply a hold-up voltage (V.sub.holdup) when the input voltage (V.sub.in) is below a threshold value.

Voltage generating circuit, semiconductor memory device, and voltage generating method
10923173 · 2021-02-16 · ·

A voltage generating circuit, a semiconductor memory device, and a voltage generating method are provided. The voltage generating circuit includes: an oscillation signal generating part generating an oscillation signal that alternately repeats a state of a first voltage and a state of a second voltage; a capacitor having one end receiving the oscillation signal and an other end connected to an output node; a switch element receiving a control voltage and set to an on state or an off state according to the control voltage, and applying the first voltage to the output node when set to the on state; and a switch control part supplying, as the control voltage to the switch element, the second voltage when the oscillation signal is in the state of the first voltage, and a voltage of the output node when the oscillation signal is in the state of the second voltage.