According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.

An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.

Startup charge balancing circuits and methods for capacitive charge pumps that avoid large in-rush currents and resulting voltage spikes. Embodiments include a charge balance circuit coupled to a corresponding charge pump capacitor of a charge pump. The charge balance circuit includes a comparator that compares the output voltage of the charge pump to a feedback voltage derived from the voltage across the corresponding charge pump capacitor. In response, either a constant current source or a constant current sink is coupled to the charge pump capacitor. Current sourcing or sinking continues until the voltage across the corresponding charge pump capacitor approximates a target voltage, at which point the comparator output toggles, which results in uncoupling of the coupled current source or current sink from the corresponding charge pump capacitor. Embodiments only need one current sink and one current source per charge pump capacitor, and charge balancing is independent of leakage currents.

A drive circuit for a switch capacitor converter having first, second, third, and fourth power switches connected in series, can include: first, second, third, and fourth drivers configured to respectively drive the first, second, third power, and fourth power switches according to control signals; a bootstrap power supply circuit comprising a bootstrap capacitor configured to supply power to the first, second, and third drivers in a time-sharing manner; and a power supply configured to supply power to the fourth driver and charge the bootstrap capacitor, where the fourth power switch is grounded.

To provide an individual boost circuit capable of boosting a minute power voltage to a target voltage more reliably. An individual boost circuit includes a first PMOS transistor that has a gate to which a first clock voltage is applied and performs on- and off-operations; a second PMOS transistor that has a gate to which a second clock voltage that has a reciprocal relation with the first clock voltage is applied and performs the on- and off-operations; an auxiliary capacitor; a boost capacitor; an auxiliary charging circuit 211 that charges an auxiliary capacitor via the second PMOS transistor with a power voltage from an external power when the first PMOS translator enters an off-state and the second PMOS transistor enters an on-state; and a boost charging circuit 212 that charges the boost capacitor via the first PMOS transistor with the second clock voltage through the auxiliary capacitor when the first PMOS transistor enters the on-state and the second switching transistor enters the off-state.

To provide an individual boost circuit capable of boosting a minute power voltage to a target voltage more reliably.

An individual boost circuit includes a first PMOS transistor that has a gate to which a first clock voltage is applied and performs on- and off-operations; a second PMOS transistor that has a gate to which a second clock voltage that has a reciprocal relation with the first clock voltage is applied and performs the on- and off-operations; an auxiliary capacitor; a boost capacitor; an auxiliary charging circuit 211 that charges an auxiliary capacitor via the second PMOS transistor with a power voltage from an external power when the first PMOS translator enters an off-state and the second PMOS transistor enters an on-state; and a boost charging circuit 212 that charges the boost capacitor via the first PMOS transistor with the second clock voltage through the auxiliary capacitor when the first PMOS transistor enters the on-state and the second switching transistor enters the off-state.

A driving circuit for a switched capacitor converter having first and second switched capacitor branches, where the first switched capacitor branch includes first and second switch groups connected between an input voltage and a reference ground, the second switched capacitor branch includes third and fourth switch groups connected between the input voltage and the reference ground, and where each switch group includes an upper power switch and a lower power switch, the driving circuit comprising: a plurality of drivers configured to correspondingly drive each power switch in the switched capacitor converter; a bootstrap capacitor that provides a power supply voltage for each driver that is configured to drive the upper power switches that are connected to the input voltage of the switched capacitor converter; and where a charging voltage for charging the bootstrap capacitor is not greater than the input voltage of the switched capacitor converter.

According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.

Disclosed is an interleaved buck-boost converter. The interleaved buck-boost converter comprises a multi-level direct current (DC) to DC converter (MLDC converter), a flying capacitor monitor, and a voltage-level controller. The MLDC converter includes the IMPM and the IMPM includes the flying capacitor. The flying capacitor monitor is in signal communication with the flying capacitor and the voltage-level controller is in signal communication with the flying capacitor monitor. The flying capacitor monitor compares a flying capacitor voltage of the flying capacitor and switches a state of operation of the MLDC converter if the flying capacitor voltage is less than a first flying capacitor reference voltage.

Disclosed is an interleaved buck-boost converter. The interleaved buck-boost converter includes a master switching stage and a slave switching stage that are controlled by a pulse-width-modulation (PWM) controller.