A switching mode power supply preventing a first switch from being falsely triggered. The switching mode power supply detects a peak of an input signal and starts timing a period of time since the arrival of the peak of the input signal is detected. The first switch starts performing the on and off switching operations when the period of time expires.

The present application provides a controller for a switching power supply such as a DC-DC converter which provides an output voltage and an output current. The controller is configured to provide at least one control signal to operate the switching power supply to maintain the output voltage at a first reference voltage. The controller employs a load line compensator responsive to output current for adjusting the reference voltage employed by the compensator. The load line compensator employs one or either or both of a high pass filter or saturating element to provide a filtered/saturated value which is the value employed in adjusting the reference voltage.

The present application provides a controller for a switching power supply such as a DC-DC converter which provides an output voltage and an output current. The controller is configured to provide at least one control signal to operate the switching power supply to maintain the output voltage at a first reference voltage. The controller employs a load line compensator responsive to output current for adjusting the reference voltage employed by the compensator. The load line compensator employs one or either or both of a high pass filter or saturating element to provide a filtered/saturated value which is the value employed in adjusting the reference voltage.

A communication device for connection with a power source and a host device is provided. The communication device comprises a device controller and a converter circuit. The device controller is adapted for data communication with the host device and the converter circuit is configured to provide a virtual device ground at least to the device controller, so as to compensate a ground potential difference between the host device and the communication device.

A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

A converter operable to convert an input voltage at an input node to an output voltage at an output node coupled to a load by switching on and off a transistor at a switching frequency, the converter comprising: an error amplifier circuit having a first input coupled to a reference voltage, a second input coupled to the output node through a resistive divider, a first output operable to output a control current and a second output operable to output a current equivalent to the control current; a peak current comparator circuit having a first input coupled to the second output of the error amplifier circuit, a second input and an output, the second input is coupled to the input node through an inductor; an off-time timer circuit having an input coupled to the first output of the error amplifier circuit and an output, the off-time timer circuit operable to set the switching frequency based on the control current; and a control circuit having a first input coupled to the output of the peak current comparator circuit, a second input coupled to the output of the off-time timer circuit and an output coupled to a control terminal of the transistor.

A DC-to-DC voltage regulator circuit comprising: an output node; a pull-up switch and a pull-down switch with an output node coupled between them; a reactive circuit element coupled to the output node; a pull-up setting voltage circuit coupled to provide a pull-up setting voltage that is a function of a voltage at the output node; a pull-down setting voltage circuit coupled to provide a pull-down setting voltage that is a function of the voltage at the output node; a first comparator coupled to cause the pull-up switch to transition between open switch state and its closed switch state based upon a comparison of the pull-up setting voltage and a control voltage; and a second comparator coupled to cause the pull-down switch to transition between its open switch state and its closed switch state.

System and method via which a switching element is switched in a regulated state of a switching converter at a predetermined stable switching frequency, wherein a switch-on point of the switching element is predetermined by a switching signal generated via a sawtooth signal reaching/exceeding a switch-on threshold value such that the switch-on point of the switching element falls in a valley of an oscillating voltage prevailing at the switched-off switching element, where a prevailing period duration of the switching signal is continuously determined to detect the period duration that is compared with a predetermined reference period duration of a period duration reference unit, a control variable is generated from the comparison and a gap is changed between the sawtooth signal, which is influenced with the valley-identifying signal, and the switch-on threshold value until ascertaining, with reference to the determined prevailing period duration, the stable switching frequency has been reached.

In an embodiment, a method includes: receiving a main supply voltage; generating a first regulated output voltage with a DC-DC converter; providing the main supply voltage to a driver of a control terminal of an output transistor of an LDO; receiving, at an input terminal of the LDO, the first regulated output voltage; generating, at an output terminal of the LDO, a second regulated output voltage from the first regulated output voltage; and when the main supply voltage falls below a predetermined threshold, discharging a capacitor coupled to the input terminal of the LDO by activating a switch coupled to the input terminal of the LDO.

Various embodiments are directed to a voltage clamp system comprising: a rectifier; a protected node, a reference node, and one or more internal nodes, coupled to the rectifier; a power converter, coupled to the rectifier via the one or more internal nodes; and one or more output nodes coupled to the power converter and configured to couple to a power sink. The rectifier and the power converter are configured to output power via one or more output nodes coupled to the rectifier, and to limit a component of the voltage between the protected node and the reference node.