The disclosure relates to a method and a control device for controlling at power semiconductor switches connected in parallel for switching a total current. The semiconductor switches each have a gate terminal. An input terminal for feeding the total current, an output terminal for discharging the total current, and a joint control terminal for receiving a joint control signal that has the state ‘disconnect’ or ‘connect’ are provided. The power semiconductor switches are each connected between to the input terminal and the output terminal. At least one ascertainment unit is designed to receive the joint control signal, ascertain individual control signals in accordance with the joint control signal to control the individual power semiconductor switches, and output the individual control signals to the gate terminals of the power semiconductor switches. The individual control signals each have the state ‘disconnect’ or ‘connect’ and differ at least temporarily.

A resonant inductive coupling extension cord and light emitting diode system having a plurality of light emitting diodes (LEDS) connected to a receiver coil designed to receive a pulsed DC current from a power supply by means of resonant inductive coupling. The power supply generates a pulsed DC current at a frequency of 0.8 KHz or greater, wherein the pulsed DC current is positive relative to ground. The power supply provides the pulsed DC current through a power coil and through the extension cords to the receiver coil. The (LEDs) are powered through resonant inductive coupling up to 160 volts. The light emitting diodes are self-limiting with respect to current. There is no potential for a spark or shock hazard when the extension cords are connected to the power supply, to the LED system or each other or whether the extension cords or LED are cut or broken.

An inductive power transmitter comprising: at least two switching elements connected across a resonant circuit, the resonant circuit including an inductance and a capacitance; wherein the transmitter is configured to adjust the value of the capacitance based on a desired operating frequency.

The disclosure relates to an inverter for supplying a power provided as a DC voltage at a DC input to an AC mains connectable to an AC output. In this case, the inverter includes a switching network with a plurality of semiconductor switches and a digital control unit for producing a digital switching pattern for digitally operated semiconductor switches of the switching network that are able to be used to produce a first output voltage (U.sub.out,dig). The inverter additionally includes a linear control unit for producing signals for actuating at least one semiconductor switch of the switching network in a linear mode, wherein the linear control unit is set up to produce a voltage drop (U.sub.out,lin) across and/or a current (I.sub.out,lin) through the at least one linearly operated semiconductor switch to a target value that is dependent on an instantaneous difference between the first output voltage (U.sub.out,dig) and a voltage (U.sub.AC) of the AC mains. The disclosure additionally relates to a control method for such an inverter and a photovoltaic (PV) installation having such an inverter.

Power converters are presented with one or more sparse multilevel actively clamped (SMAC) power converter stages, where the individual stages include an integer number N capacitors or DC voltage sources coupled between stage DC inputs to provide L=N+1 converter stage DC voltage nodes, with a switching circuit having no more than L*(L−1) switching devices and no flying or floating DC storage capacitors, where N is greater than 2.

A control circuit having: a logic circuit, configured to provide a high side boot-strap capacitor control signal set and a low side boot-strap capacitor control signal set; a high side boot-strap capacitor control circuit, configured to provide a high side power signal to control a high side power switch; a high side boot-strap capacitor, having a first terminal coupled to a control terminal of the high side power switch, and a second terminal coupled to the high side boot-strap capacitor control circuit; a low side boot-strap capacitor control circuit, configured to provide a low side power signal to control a low side power switch; and a low side boot-strap capacitor, having a first terminal coupled to a control terminal of the low side power switch, and a second terminal coupled to the low side boot-strap capacitor control circuit.

A power inverter has an inverter unit with a housing defining a main compartment and a first lateral compartment adjacent the main compartment. The main compartment contains an inverter power module configured to convert direct current (DC) power into alternating current (AC) power output, an inverter driver module configured to provide driving signals to drive the inverter power module, an inverter control module configured to provide control signals to the inverter driver module to control the AC power output, and a capacitor for coupling to the DC power. The capacitor is arranged on or over at least one of the inverter power module, the inverter driver module, or the inverter control module. Additionally, the power inverter has a base on which the housing sits, the base comprising a heat sink configured to draw heat away from one or more of the inverter power module, the inverter driver module, or the inverter control module.

Systems related to controlling a DC/AC converter. A control system uses a nonlinear adaptive observer to estimate the state variables inverter current and converter voltage using a sensed grid current and a bus voltage as inputs. For non-observable points (such as when the duty cycle=0.5), the required information can be found from the DC bus voltage.

A semiconductor device having an arm block. The arm block includes a first circuit pattern that, in a plan view of the semiconductor device, has a recess formed thereon that extends inward from a side thereof, the recess forming a disposition area of the semiconductor device, a second circuit pattern having at least a part disposed in the disposition area, and a plurality of semiconductor chips formed on the first circuit pattern. Each semiconductor chip has a positive electrode on a back surface thereof, and a control electrode and a negative electrode on a front surface thereof, the negative electrode being electrically connected to the second circuit pattern by a wiring member.

Aspects of the invention can include a pulse generating means that outputs a set signal and reset signal for driving the high potential side switching element is such that, while either one of the set signal or reset signal is in an on-state as a main pulse signal for putting the high potential side switching element into a conductive state or non-conductive state, the other signal is turned on a certain time after the rise of the main pulse signal, thereby generating a condition in which the set signal and reset signal are both in an on-state.