Patent classifications
H03B5/1253
Differential voltage-controlled (VCO) oscillator
The present application relates to a differential Colpitts voltage-controlled oscillator (VCO) circuit, which comprises a pair of transistors with control terminals biased by a common biasing voltage and a pair of couplers arranged to cross-couple corrector/drain of the transistors and the base/gate of the differential transistors. The pair of couplers have a coupling factor k.sub.c, which used to enhance the transconductance of the transistor pair, therefore can be used for power consumption reduction and phase noise minimalization.
OSCILLATOR CIRCUIT
A frequency variable oscillator generates a clock having a frequency according to a control signal. A reference current source generates a reference current. A path selector distributes the reference current to a first path and a second path in a time-sharing manner in synchronization with the clock. An F/V conversion circuit includes a capacitor connected to the first path, and charges or discharges the capacitor with the reference current and generates a detection voltage. The reference voltage source includes a resistor connected to the second path, and outputs a reference voltage according to a voltage across the resistor. A feedback circuit adjusts a control signal so that the detection voltage approaches the reference voltage.
Biasing circuit for capacitor switch transistor and method therefore
A biasing circuit for biasing a switching transistor, wherein the switching transistor is used for switching a respective capacitor cell into/out of a capacitor array, wherein the capacitor array comprises one or more such capacitor cells, and wherein the capacitor array is coupled in parallel with a primary inductor to form an inductive/capacitive tank. The biasing circuit comprises a secondary inductor which is inductively coupled to the primary inductor, the secondary inductor configured to provide a bias signal for biasing the switching transistor.
Low noise amplifier
A low noise amplifier is provided. The low noise amplifier includes an input port, an output port, an inverter, a plurality of switched-capacitor units and a feedback inductor. The inverter is electrically connected between the input port and the output port. Each of the plural switched-capacitor units is electrically connected with the inverter in parallel and includes a switch and a capacitor connected in series. The feedback inductor is electrically connected with the inverter in parallel.
OSCILLATOR CIRCUIT, DEVICE, AND METHOD
A voltage-controlled oscillator (VCO) includes a first transistor cross-coupled with a second transistor, and a transformer-coupled band-pass filter (BPF) including a first transformer and a second transformer. The first transformer is configured to control a gate and a drain terminal of the first transistor, and the second transformer is configured to control a gate and a drain terminal of the second transistor.
LOW NOISE AMPLIFIER
A low noise amplifier is provided. The low noise amplifier includes an input port, an output port, an inverter, a plurality of switched-capacitor units and a feedback inductor. The inverter is electrically connected between the input port and the output port. Each of the plural switched-capacitor units is electrically connected with the inverter in parallel and includes a switch and a capacitor connected in series. The feedback inductor is electrically connected with the inverter in parallel.
DAC AND OSCILLATION CIRCUIT
The present technology relates to a DAC (Digital to Analog Converter) and an oscillation circuit that allow widening of a range of a voltage to be output from the DAC. A plurality of first switches is connected to a voltage-dividing resistor and each configured to output, as a first voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of first switches. A plurality of second switches is connected to the voltage-dividing resistor and each configured to output, as a second voltage, a voltage at a corresponding one of connection points between the voltage-dividing resistor and the plurality of second switches. The present technology can be applied to, for example, a VCO (Voltage-Controlled Oscillator) and the like that oscillates a signal with a frequency according to a voltage to be output from a DAC.
SYSTEM AND METHOD FOR REDUCING CURRENT NOISE IN A VCO AND BUFFER
A voltage controlled oscillator (VCO) and buffer circuit includes a voltage controlled oscillator (VCO), a buffer circuit configured to receive a signal generated by the VCO, the buffer circuit comprising a first transistor having a parasitic gate-source capacitance (Cgs), and a second transistor coupled across the first transistor, wherein a gate of the first transistor is coupled to a drain and a source of the second transistor, and a gate of the second transistor is coupled to a source of the first transistor.
Variable capacitance circuit, oscillator circuit, and method of controlling variable capacitance circuit
A capacitor bank has a capacitance value that is discontinuous and has an extremely narrow variable range. Thus, in a case of obtaining a wide variable range of the capacitance value, a large number of capacitors are connected in parallel and used while being switched by switches. The present technology achieves at least one of: allowing the capacitance value of a variable capacitance circuit to be varied continuously by electrical control without increasing the parasitic capacitance; and decreasing the current consumption of an oscillator circuit using the variable capacitance circuit as compared to a conventional case. The variable capacitance circuit includes: a transconductance circuit that includes a MOS transistor; an inductor that is connected in parallel to the transconductance circuit; and a Gm control circuit that varies a transconductance of the MOS transistor.
BIASING CIRCUIT FOR CAPACITOR SWITCH TRANSISTOR AND METHOD THEREFORE
A biasing circuit for biasing a switching transistor, wherein the switching transistor is used for switching a respective capacitor cell into/out of a capacitor array, wherein the capacitor array comprises one or more such capacitor cells, and wherein the capacitor array is coupled in parallel with a primary inductor to form an inductive/capacitive tank. The biasing circuit comprises a secondary inductor which is inductively coupled to the primary inductor, the secondary inductor configured to provide a bias signal for biasing the switching transistor.