An operational amplifier circuit is provided. The operational amplifier circuit includes a differential input stage circuit and a loading stage circuit. The differential input stage circuit includes an input circuit, a voltage maintaining circuit, and a current source. The input circuit includes a first input transistor and a second input transistor, for receiving a first and a second input signals, respectively. The voltage maintaining circuit includes a first branch circuit and a second branch circuit. The first branch circuit is coupled to the first input transistor for receiving the first input signal, and the second branch circuit is coupled to the second input transistor for receiving the second input signal. The current source is coupled to the first input transistor and the second input transistor. The loading stage circuit is coupled to the voltage maintaining circuit.

In a general aspect, a current sense amplifier circuit (CSA) can include a null amplifier path and a main amplifier path that are both configured to receive a differential input voltage. The null amplifier path can output a first differential output voltage based on the differential input voltage. The main amplifier path can also be configured to receive the first differential output voltage and output a second differential output voltage based on the differential input voltage and the first differential output voltage. The null and main amplifier paths can each include a differential amplifier having first and second input stages that are each configured to receive the differential input voltage. The first input stage and the second input stage of the main amplifier path can and be powered by a respective (first and second) floating voltage supply rails that are referenced to a floating ground rail.

A first embodiment is directed to a circuit including a positive biasing circuit with a drive PMOS for biasing in subthreshold, a negative biasing circuit with a drive NMOS for biasing in subthreshold, and an amplification circuit coupled to the biasing circuits. The amplification circuit includes a first stage with a first boosting stage, a second stage with a second boosting stage, and a resistive element coupled between the first and second stages. A second embodiment is directed to a folded cascode operational amplifier wherein a value of the resistive element is selected to place at least one of a drive MOS in subthreshold. A third embodiment is directed to an integrated circuit with a resistive area neighboring a first boosting area and a second boosting area, the resistive area including a resistive element directly connected to a drive PMOS and a drive NMOS.

An amplifier circuit includes a plurality of gain stages that change a gain in each stage and include a first gain stage and a final gain stage, an output terminal that outputs a signal amplified by the plurality of gain stages, a negative input terminal connected to an input node of the first gain stage, a feedback circuit connected between an output node of the final gain stage and the negative input terminal, a first resistor connected between the output node of the final gain stage and the output terminal, an active load of the first gain stage including a first transistor, a second resistor connected to a gate or a base of the first transistor, and a capacitor connected between the gate or the base of the first transistor and the output node of the final gain stage.

A multi-protocol receiver for receiving at least one input signal comprises: a comparator, a protection controller, and a multi-stage current mode logic (CML) buffer. The comparator compares a reference voltage and a predefined voltage. At least one output of the comparator is coupled to at least one input of the protection controller. The multi-stage current mode logic buffer receives the input signal and the reference voltage. Outputs of the protection controller are coupled to control inputs of the multi-stage CML buffer for operating the multi-stage CML buffer to process the input signal and the reference signal.

A differential input amplification-stage circuit comprises a voltage unit, first and second bulk-driven transistors, first and second mirror current sources, and a differential amplifier unit. The first and the second bulk-driven transistors respectively receive first and second input voltages, and converts the first and the second input voltages into first and second output currents. The differential amplifier unit separately outputs first and second adjustment currents under an action of voltages output by the first to the third voltage output ends. The first and the second mirror current sources respectively output first and second predetermined currents according to the first output current and the first adjustment current, and the second output current and the second adjustment current, so as to maintain transconductance constancy of the differential input amplification-stage circuit. Therefore, output stability is improved.

Systems and methods for providing a high performance current source are described. In an example implementation, the current source includes transistors in dual current mirror configuration. The dual mirror configuration employs current feedback to increase the output resistance of the current source while achieving a wide voltage swing.

An operational amplifier circuit includes an operational amplifier and a control circuit. The operational amplifier includes a first input terminal, a second input terminal, and an output terminal connected with the second input terminal. The operational amplifier amplifies a signal provided through the first input terminal, and outputs the amplified signal through the output terminal. The control circuit generates switching signals. In response to the switching signals, the operational amplifier resets the output terminal to a preset voltage, charges the reset output terminal, and compares a voltage of the output terminal charged with a reference voltage provided through the first input terminal to output a comparison voltage.

According to an embodiment, an active inductor has a first conductivity type MOS transistor with a source that is connected to an electrical power source supply line and a drain that is connected to an output terminal. It has a capacitance between a gate of the first conductivity type MOS transistor and the electrical power source supply line. It has a diode element that is connected between a drain and a gate of the first conductivity type transistor. It has an electric current source that supplies a bias electric current in a forward direction to the diode element.

A variable gain amplifier includes an input transistor, an auxiliary transistor, an active inductor and an input current replica circuit. The input transistor is arranged for receiving an input signal to generate an output signal at an output terminal. The auxiliary transistor is coupled to the output terminal of the input transistor, wherein a current of the output terminal flows into the input transistor and the auxiliary transistor. The active inductor is coupled to the output terminal of the input transistor. The input current replica circuit is coupled to the output terminal of the input transistor, wherein a current flowing through a portion of the input current replica circuit is equal to the current flowing through the input transistor, and both a current of the active inductor and the current of the portion of the input current replica circuit flow into the output terminal of the input transistor.