H03F3/45766

CIRCUIT FOR VOLTAGE OFFSET COMPENSATION
20250023531 · 2025-01-16 ·

A circuit includes a current source, a differential pair of transistors coupled to the current source, an active load, and a current injection circuit. The differential pair of transistors has a first offset voltage and an input transconductance. The current injection circuit is configured to supply a first current and a second current to produce a second offset voltage across the differential pair of transistors opposite the first offset voltage. The first current and the second current has a same thermal dependence as the input transconductance of the differential pair of transistors.

BOOTSTRAPPED SWITCHING CIRCUIT

This disclosure relates to a bootstrapped switching circuit. Example embodiments include a bootstrapped switching circuit (100) comprising: a positive output node (109+); a negative output node (109); a first input node (106a) configured to receive a first input voltage (Vin1); a second input node (106b) configured to receive a second input voltage (Vin2). First, second third and fourth switches (101-104) are coupled between the input and output nodes (106a, 106b, 109+, 109). A first negative bootstrapped level shifter (107a) and a first positive bootstrapped level shifter (107b) coupled between the first input node (106a) and a first clock signal circuit (110a) provide control signals to the first and second switches (101, 102). A second negative bootstrapped level shifter (108a) and a second positive bootstrapped level shifter (108b) coupled between the second input node (106b) and a second ground referenced supply line (110b) provide control signals to the third and fourth switches (103, 104). Each of the first, second, third and fourth switches (101, 102, 103, 104) comprise first and second MOSFETs (201a, 201b, 202a, 202b, 203a, 203b, 204a, 204b) of an opposite type in a series connected arrangement.

CIRCUIT FOR BIASING AN EXTERNAL RESISTIVE SENSOR

According to an embodiment, a circuit includes a core and low-frequency recovery circuits. The core circuit is configured to bias a resistive sensor used to measure a fly height of a hard disk drive. The core circuit is additionally configured to amplify a high-frequency component of a sensing signal of the resistive sensor, the sensing signal indicating the fly height. The low-frequency recovery circuit is configured to amplify the sensing signal's low-frequency component.