A variable resistance element is connected between a first input terminal of a first amplifier and a second input terminal of a second amplifier, and has a resistance value between the first input terminal and the second input terminal that is varied according to an amplitude value of a first voltage signal or an amplitude value or a differential voltage signal. A variable current source is connected between the first input terminal and a ground, and controls a current value of a current flowing to the ground from the first input terminal according to a value of an offset of the differential voltage signal. A bias voltage having the same value as that of a bias voltage that is applied to the first input terminal is applied to the second input terminal.

The present invention provides a differential signal offset adjustment circuit, wherein first and second transistors are respectively coupled between a power supply line and a first current source, and between the power supply line and a second current source. First and second resistors are respectively coupled between the first transistor and a first variable current source, and between the second transistor and a second variable current source. Third and fourth transistors are respectively coupled between a third resistor and a third current source, and between a fourth resistor and a fourth current source, and have input terminals respectively coupled to the first and second resistors. Fifth and sixth transistors are respectively coupled between the power supply line and a fifth current source, and between the power supply line and a sixth current source, and have input terminals respectively coupled to the third and fourth transistors. A fifth resistor is coupled between the third and fourth current sources.

An optical receiver includes a photodiode, a transimpedance amplifier (TIA), a slope detection circuit, and a logic circuit. The TIA includes an output stage and a feedback amplifier and is coupled to the photodiode. The slope detection circuit is coupled to the feedback amplifier and configured to monitor a feedback signal from the feedback amplifier. The slope detection circuit is configured to provide, in response to a slope in the feedback signal being detected, a first slope-status signal indicating the slope is detected. The logic circuit is coupled to the slope detection circuit and is coupled to the output stage of the TIA. The logic circuit is configured to squelch the output stage of the TIA in response to the first slope-status signal.

Examples described herein relate to an analog front-end (AFE). The AFE includes a trans-impedance amplifier to receive an input current and generate a pair of the differential voltage signals based on the input current and a reference current. Further, the AFE includes a dynamic voltage slicer to receive the differential voltage signals at input terminals and supply digital voltages at output terminals. The dynamic voltage slicer includes a preamplifier to generate a pair of intermediate voltages based on the differential voltage signals sampled at a predetermined frequency. The dynamic voltage slicer also includes a voltage latch circuit coupled to the preamplifier, wherein the voltage latch circuit is to regenerate a pair of digital voltages based on the pair of the intermediate voltages. Moreover, the AFE includes a logic latch coupled to the dynamic voltage slicer to provide digital output states based on the pair of the digital voltages.

In at least one embodiment, a differential amplifier including first and second current transfer systems, a current difference producing system, and a feedback network circuit is provided. The first current transfer system generates a first differential current signal. The second current transfer system generates a second differential current signal. The current difference producing system receives the first differential current signal and the second differential current signal and generates a voltage difference signal that is indicative of a difference between a first current signal and a second current signal. The feedback network circuit converts the voltage difference signal into at least two converted current signals and provides the at least two converted current signals to one of the first and second current transfer systems or the current difference producing system to minimize the difference between the first current signal and the second current signal.

There is provided an electroencephalogram (EEG) signal amplifier for boosting impedance in an analog front end (AFE). The EEG signal amplifier includes a first feedback loop configured to amplify an EEG signal, a second feedback loop connected to the first feedback loop and configured to amplify an input impedance, and an attenuator included in the second feedback loop.

An offset compensated differential amplifier employing a multi-tan h circuit comprising differential pairs coupled in parallel to compensate for an offset voltage of the output voltage in the offset compensation calibration mode is disclosed. The differential pairs each include a compensation transistor coupled to the positive internal node and a reference transistor coupled to the negative internal node. Each compensation transistor receives the compensation control voltage and each reference transistor receives a different reference voltage. The multi-tan h circuit generates an offset compensation voltage on the positive and negative internal nodes based on a difference between the compensation control voltage and the different reference voltages. The multi-tan h circuit comprises a larger linear range than a hyperbolic tangent current transfer function of a single differential pair. The offset compensated differential amplifier provides offset compensation with improved linearity and a finer granularity compared to a conventional differential amplifier.

Chopper amplifiers with tracking of multiple input offsets are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected along a signal path. The amplification circuit includes two or more pairs of input transistors, from which a control circuit chooses a selected pair of input transistors to amplify an input signal. The chopper amplifier further incudes an offset correction circuit that senses the signal path to generate an input offset compensation signal for the amplification circuit. Furthermore, the offset correction circuit separately tracks an input offset of each of the two or more pairs of input transistors.

The present disclosure provides a differential reference voltage buffer, including: a buffer stage, including at least a first transistor and a second transistor; a control circuit, connected with the buffer stage and forming a negative feedback structure for generating a differential reference voltage; a current compensation circuit for compensating a resistive load current of the control circuit; and a drive stage for generating an output differential reference voltage. The differential reference voltage is generated according to an external input reference voltage and a common mode input voltage. The common mode voltage can be set separately, so that the flexibility is high. The current generated by a resistive network in the control circuit is compensated by the current compensation circuit, so that the current of a follow device in the buffer stage is not influenced by the control circuit, thereby generating a differential reference voltage with high accuracy output.

An amplifier device includes an amplifier circuitry, a controller circuitry, and an offset cancellation circuitry. The amplifier circuitry is configured to amplify a first input signal and a second input signal, in order to generate a first output signal and a second output signal. The controller circuitry is configured to generate a first control signal and a second control signal according to the first output signal and the second output signal. The offset cancellation circuitry is configured to provide a negative capacitor to the amplifier circuitry, and to adjust at least one current flowing through a circuit, which provides the negative capacitor, of the offset cancellation circuitry according to the first control signal and the second control signal, in order to cancel an offset of the amplifier circuitry.