A frequency converter comprising a frequency transposition block for samples (11.sub.Q.sub._.sub.1, 11.sub.Q.sub._.sub.2), a filtering block (12.sub.Q.sub._.sub.1, 12.sub.Q.sub._.sub.2), the filtered samples y(n) verifying y(n)=c(0).Math.x(n)+c(1).Math.x(n−1)+c(2).Math.x(n−2)+ . . . +c(p−1).Math.x(n−p+1)+c(p).Math.x(n−p)+c(p−1).Math.x(n−p−1)+ . . . + . . . +c(1).Math.x(n−2.Math.p+1)+c(0).Math.x(n−2.Math.p), wherein x( ) are the transposed samples and c(0), . . . c(p) are the real coefficients of the filter; and being adapted for, during a cycle for determining the value of the filtered sample y(n): calculating the first terms c(0).Math.x(n), c(1).Math.x(n−1), c(2).Math.x(n−2), . . . , c(p).Math.x(n−p) by multiplying the respective coefficients and transposed samples, and storing in memory said first calculated terms; reading the second terms c(p−1).Math.x(n−p−1), . . . , c(1).Math.x(n−2.Math.p+1), c(0).Math.x(n−2.Math.p), calculated and stored in memory during previous cycles for determining the value of filtered samples y(n−m); and determining y(n) by summation of the first and second terms.

A digital down converter includes a low resolution mixer, a decimation filter, and a high resolution mixer. The low resolution mixer is configured to receive a digitized radio frequency signal, and apply a first down conversion to the radio frequency signal to produce an intermediate frequency signal. The decimation filter is coupled to the low resolution mixer. The decimation filter is configured to receive the intermediate frequency signal, and reduce a sampling rate of the intermediate frequency signal to produce a decimated intermediate frequency signal. The high resolution mixer is coupled to the decimation filter. The high resolution mixer is configured to receive the decimated intermediate frequency signal, and apply a second down conversion to the decimated intermediate frequency signal to produce a down converted signal.

Provided is a digital filter that is configured to generate a first integration signal by integrating data groups, which are generated by sampling sample data within a first time period that overlaps with another time period, configured to generate a second integration signal by integrating data groups, which are generated by sampling the sample data within a second time period that is included in the first time period, the first time period and the second time period overlapping with one another, and configured to output a difference between the first and second integration signals as digital data. The first integration signal is generated during a third time period that is included in the first time period.

A finite impulse response (FIR) filter including a delay line and a plurality of arithmetic units. Each arithmetic unit is coupled to a different one of a plurality of tap points of the delay line, is configured to receive a respective signal value over the delay line, and is associated with a respective coefficient. Any given one of the arithmetic units is configured to receive a respective control word. The respective control word specifying: (i) a plurality of trivial multiplication operations, and (ii) a plurality of bit shift operations. Any given one of the arithmetic units is further configured to estimate or calculate a product of the respective signal of the arithmetic unit respective signal value and the respective coefficient of the arithmetic unit by performing the trivial multiplication operations and bit shift operations that are specified by the respective control word that is received at the given arithmetic unit.

Dual mode filters having two reconfigurable multi-stage filters. In a dual band mode, each reconfigurable filter filters an input signal in a different band using every filter stage. In a single band mode, both reconfigurable filters are effectively divided into two sub-chains that include either the odd-numbered filter stages or the even-numbered filter stages. Together, the four sub-chains in the single band mode filter an input signal in a single band with a higher parallelization than each reconfigurable filter in the dual band mode. In some embodiments, the dual mode filter is a decimation filter. In other embodiments, the dual mode filter is a resampling filter. In still other embodiments, the dual mode filter is an interpolation filter.

Examples of the disclosure relate to an apparatus that provides a decimator for audio signals. The apparatus comprises means for: receiving one or more audio input signals and applying a multi-stage decimation process to the one or more audio input signals wherein the multi-stage decimation process comprises at least a first branch and a second branch. The apparatus also comprises means for applying audio signal analysis to the one or more audio input signals. The audio signal analysis extracts at least one audio signal parameter from the one or more audio input signals and is performed on the output of the first branch of the multi-stage decimation process. Use of the second branch of the multi-stage decimation process is dependent upon the outcome of the audio signal analysis.

A method and device estimate an amplitude of a periodic component in a measured analog signal, e.g. from an electric motor, and adapt a control law for an external entity, e.g., a variable speed drive (VSD) controlling the motor, based on the estimated amplitude. The measured analog signal is converted by delta-sigma modulation to a digital signal that is applied to at least one filter. Periodic signals of independent known periodic functions are also applied to the at least one filter. In response, the at least one filter provides the estimated amplitude of the periodic component in the measured analog signal that may be used to adapt the control law. A monitoring value for the electric motor may also be based on the estimated amplitude of the periodic component.

An analog-to-digital conversion system may include an analog-to-digital converter configured to convert an analog input signal into an equivalent digital input signal, a first filtering path configured to filter the equivalent digital input signal to generate a first filtered digital signal, wherein the first filtering path comprises a zero-overshoot monotonic step response filter, a second filtering path configured to filter the equivalent digital input signal to generate a second filtered digital signal, wherein the second filtering path comprises a frequency-selective filter; and a mixer configured to either: (i) select between the first filtered digital signal and the second filtered digital signal in order to generate an output digital signal; or (ii) combine selected proportions of each of the first filtered digital signal and the second filtered digital signal in order to generate the output digital signal.

A data sensing circuit includes one or more drive sense circuits operably coupled to a plurality of data sources. The one or more drive sense circuits produces a plurality of digital sense signals regarding the plurality of data sources at an oversampling rate. The data sensing circuit further includes a digital filtering circuit operably coupled to receive, in parallel, at least some of the plurality of digital sense signals and generate, in a serial manner, a plurality of affect values from the least some of the plurality of digital sense signals.

A method includes converting, by n analog to digital converter circuits, n analog signals into n first digital signals having a first data rate frequency; converting, by n digital decimation filtering circuits, the n first digital signals into n second digital signals having a second data rate frequency; and converting, by n digital bandpass filter (BPF) circuits, the n second digital signals into a plurality of outbound digital signals having a third data rate frequency. The coefficients for the taps of a digital BPF circuit is set to produce a bandpass region approximately centered at the oscillation frequency of the analog signal and having a bandwidth tuned for filtering a pure tone component of the analog signal. The first data rate frequency is a first integer multiple of the third data rate frequency. The second data rate frequency is a second integer multiple of the third data rate frequency.