A digital-to-analog converter (DAC) device includes a DAC circuitry, a calibration circuitry, and a randomization circuitry. The DAC circuitry includes a first DAC circuit and a second DAC circuit. The first DAC circuit is configured to generate a first signal according to least significant bits of an input signal. The second DAC circuit is configured to output a second signal. The calibration circuitry is configured to compare the first signal with the second signal, in order to calibrate the second DAC circuit. The randomization circuitry is configured to randomize most significant bits of the input signal, in order to generate first control signals, in which the second DAC circuit is further configured to generate the second signal according to the most significant bits or the first control signals.

A digital-to-analog conversion circuit is used for converting a first digital input into a first analog output, and includes a segmentation circuit, a plurality of multi-bit dynamic element matching digital-to-analog converters (DEM DACs), and a combination circuit. The segmentation circuit applies segmentation to the first digital input to generate a plurality of code segments. The multi-bit DEM DACs convert the code segments into a plurality of DAC outputs, respectively, wherein the multi-bit DEM DACs include at least a first multi-bit DEM DAC and a second multi-bit DEM DAC, and the first multi-bit DEM DAC and the second multi-bit DEM DAC employ different DEM techniques. The combination circuit combines the DAC outputs to generate the first analog output.

A dynamic-zoom analog to digital converter (ADC) having a coarse flash ADC and a fine passive single-bit modulator is disclosed. Radio frequency (RF) devices incorporating aspects of the present disclosure may support multiple wireless modes operating at different frequencies. Therefore, the RF devices have need for an ADC which is flexible and optimizable in terms of resolution, bandwidth, and power consumption. In this regard, the RF devices incorporate circuits, such as ADC circuits, which incorporate a discrete-time passive delta-sigma modulator. In order to improve the resolution of the delta-sigma modulator, a coarse ADC is deployed as a zooming unit to a single-bit passive delta-sigma modulator to provide a coarse digital conversion. Coarse conversion is used to dynamically update reference voltages at an input of the delta-sigma modulator using a multi-bit feedback digital to analog converter (DAC). The dynamic-zoom ADC supports multiple modes with improved power and quantization noise.

The present disclosure relates generally to digital microphone and other sensor assemblies including a transducer and a delta-sigma analog-to-digital converter (ADC) with digital-to-analog converter (DAC) element mismatch shaping and more particularly to sensor assemblies and electrical circuits therefor including a dynamic element matching (DELM) entity configured to select DAC elements based on data weighted averaging (DWA) and a randomized non-negative shift.

An estimate of unit current element mismatch error in a digital to analog converter circuit is obtained through a correlation process. Unit current elements of the digital to analog converter circuit are actuated by bits of a thermometer coded signal generated in response to a quantization output signal. A correlation circuit generates the estimates of the unit current element mismatch error from a correlation of a first signal derived from the thermometer coded signal and a second signal derived from the quantization output signal.

A circuit 100 is described comprising (i) a first digital-to-analog converter 110, (ii) a second digital-to-analog converter 111, (iii) a plurality of unit elements 120, and (iv) switching circuitry 130. The switching circuitry 130 is adapted so that in a first switching state 231, a set of unit elements 221 of the plurality of unit elements 120 forms part of the first digital-to-analog converter 110, and in a second switching state 232, the set of unit elements 221 forms part of the second digital-to-analog converter 111. Furthermore, a corresponding method of operating a circuit 100 is described.

A dynamic-zoom analog to digital converter (ADC) having a coarse flash ADC and a fine passive single-bit modulator is disclosed. Radio frequency (RF) devices incorporating aspects of the present disclosure may support multiple wireless modes operating at different frequencies. Therefore, the RF devices have need for an ADC which is flexible and optimizable in terms of resolution, bandwidth, and power consumption. In this regard, the RF devices incorporate circuits, such as ADC circuits, which incorporate a discrete-time passive delta-sigma modulator. In order to improve the resolution of the delta-sigma modulator, a coarse ADC is deployed as a zooming unit to a single-bit passive delta-sigma modulator to provide a coarse digital conversion. Coarse conversion is used to dynamically update reference voltages at an input of the delta-sigma modulator using a multi-bit feedback digital to analog converter (DAC). The dynamic-zoom ADC supports multiple modes with improved power and quantization noise.

A method includes receiving samples of digital to analog converter (DAC), partitioning the samples to unit-DACs based upon previous partitions of inputs to the unit-DACs to cancel out integrated non-linearities of outputs of the DAC caused by the gain mismatches of the unit-DACs, including partitioning samples of DAC input to the unit-DACs through a recursive nth order partitioning algorithm. The algorithm includes, for each DAC input, determining a first partition of the DAC input that would cancel an (n1)th order previously integrated non-linearity, adding an equivalent DAC input of the first partition to the DAC input to obtain a total DAC input, using a first order application of the total DAC input to the inputs of the unit-DACs to yield a second partition of DAC input, summing the first and second partitions generate a final partition, and, based on the final partition, computing non-linearity remainders at each order of integration.

A data weighted averaging (DWA) data word in a standard or normal form unary code format is first converted to a thermometer control word in an alternative or spatial form unary code format. The thermometer control word is then converted from the alternative or spatial form unary code format to output a corresponding binary word.

A circuit for digital-to-analog conversion using a plurality of 3-level cells includes a circuit for digital-to-analog conversion using a plurality of 3-level cells mutually independently providing positive electricity, providing negative electricity, or floating. The circuit including a preprocess circuit and a shift circuit. The preprocess circuit is configured to receive thermometer code data generated from signed binary data and generate a shift count for shifting a cell pointer pointing to one of the plurality of 3-level cells for dynamic element matching (DEM) from the thermometer code data. The shift circuit is configured to store the cell pointer and shift the stored cell pointer according to the shift count. The shifted cell pointer is shifted in proportion to an absolute value of the binary data in a direction depending on a sign of the binary data.