In an embodiment an analog-to-digital converter circuit has an input for receiving at least a first analog signal level, a ramp generator adapted to provide a ramp signal having a constant and adjustable starting level which splits into a first section which is rising and a second section which is falling concurrently to the first section's rising, wherein the starting level lies within an input range of the analog-to-digital converter circuit, a comparison unit which is coupled by its first input to the input of the analog-to-digital converter circuit and is coupled by its second input in a switchable manner to the ramp generator, a counter which is coupled to a control unit, and the control unit which is coupled to an output of the comparison unit, wherein the control unit is prepared to enable the counter depending on a comparison of the ramp signal with the first analog signal level and to determine a digital value as a function of a count of the counter reached at an intersection point of the ramp signal with at least the first analog signal level.

In an embodiment an analog-to-digital converter circuit has an input for receiving at least a first analog signal level, a ramp generator adapted to provide a ramp signal having a constant and adjustable starting level which splits into a first section which is rising and a second section which is falling concurrently to the first section's rising, wherein the starting level lies within an input range of the analog-to-digital converter circuit, a comparison unit which is coupled by its first input to the input of the analog-to-digital converter circuit and is coupled by its second input in a switchable manner to the ramp generator, a counter which is coupled to a control unit, and the control unit which is coupled to an output of the comparison unit, wherein the control unit is prepared to enable the counter depending on a comparison of the ramp signal with the first analog signal level and to determine a digital value as a function of a count of the counter reached at an intersection point of the ramp signal with at least the first analog signal level.

A digital-to-analog converter comprises a plurality of first digital-to-analog converter cells configured to generate a first analog signal based on first digital data, wherein the first digital-to-analog converter cells of the plurality of first digital-to-analog converter cells are coupled to a first output node for coupling to a first load. Further, the digital-to-analog converter comprises a plurality of second digital-to-analog converter cells configured to generate one or more second analog signals based on second digital data, wherein the second digital-to-analog converter cells of the plurality of second digital-to-analog converter cells are coupled to one or more second output nodes, and wherein the plurality of first digital-to-analog converter cells and the plurality of second digital-to-analog converter cells are coupled to a power supply node for coupling to a mutual power supply.