A bit interleaving method applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks of Q bits each, dividing the processed codeword into constellation words of M bits each, and applying an intra-cyclic-block permutation process to the cyclic blocks, where the codeword is divided into FN/M folding sections of M/F cyclic blocks each and the constellation words are each associated with one of the folding sections, and the bit permutation process is applied such that the constellation words are each made up of F bits from each of M/F different cyclic blocks in the associated section, after the permutation process.

Certain aspects of the present disclosure generally relate to techniques for efficient, high-performance decoding of low-density parity check (LDPC) codes, for example, by using an adjusted minimum-sum (AdjMS) algorithm, which involves approximating an update function and determining magnitudes of outgoing log likelihood ratios (LLRs). Similar techniques may also be used for decoding turbo codes. Other aspects, embodiments, and features (such as encoding technique) are also claimed and described.

The invention relates to an apparatus for providing at least one parity check matrix defining a spatially-coupled low density parity check, LDPC, code on the basis of a set of base matrix parameters defining a plurality of base matrices, each base matrix of the plurality of base matrices being associated with a protograph of a plurality of protographs, wherein the apparatus comprises: a processor configured to: generate on the basis of the plurality of protographs a set of candidate protographs by discarding protographs of the plurality of protographs; lift the protographs of the set of candidate protographs for generating a plurality of codes; and generate on the basis of a plurality of codes a set of candidate codes by discarding codes of the plurality of codes.

In an illustrative example, an apparatus includes a controller and a memory that is configured to store a codeword of a convolutional low-density parity-check (CLDPC) code. The codeword has a first size and includes multiple portions that are independently decodable and that have a second size. The controller includes a CLDPC encoder configured to encode the codeword and a CLDPC decoder configured to decode the codeword or a portion of the codeword.

A black box recorder for an autonomous vehicle includes an interface configured to receive data from an engine control unit (ECU) device. The data includes first data and second data. The black box recorder further includes an error correction code (ECC) engine configured to determine a first parity size associated with the first data based on a characteristic of the first data and a second parity size associated with the second data based on a characteristic of the second data. The first parity size is different than the second parity size. The ECC engine is further configured to generate a convolutional low-density parity-check (CLDPC) codeword that includes the first data, the second data, first redundancy data associated with the first data, and second redundancy data associated with the second data. The first redundancy data has the first parity size, and the second redundancy data has the second parity size.

In an illustrative example, a method includes receiving data to be processed in accordance with a convolutional low-density parity-check (CLDPC) code. The method also includes processing the data based on a parity check matrix associated with the CLDPC code. The parity check matrix includes a first portion and a second portion. The first portion includes a plurality of copies of a first sub-matrix that is associated with a first sub-code, and the second portion includes a copy of second sub-matrix that is associated with a second sub-code.

A bit interleaving method applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks of Q bits each, dividing the processed codeword into constellation words of M bits each, and applying an intra-cyclic-block permutation process to the cyclic blocks, where the codeword is divided into FN/M folding sections of M/F cyclic blocks each and the constellation words are each associated with one of the folding sections, and the bit permutation process is applied such that the constellation words are each made up of F bits from each of M/F different cyclic blocks in the associated section, after the permutation process.

A decoder system can include a plurality of smaller sub-decoders such that the decoder system is a partitioned LDPC decoder system. Each sub-decoder may be communicably coupled to two adjacent sub-decoders. Each sub-decoder in the partitioned LDPC decoder system may be responsible for decoding an exclusive subset of a code word based on information received from two adjacent sub-decoders. Each sub-decoder may be one of two or more types.

A data structure of a check matrix for the error correction code is a data structure of a check matrix for an error correction code, in which the error correction code is the LDPC code, and in which the check matrix has a matrix structure in which rows are rearranged for submatrices consisting of a part of columns of the check matrix. Moreover, in the method and device for varying the coding rate of the error correction code, a puncture position that is determined in accordance with a puncture position determination signal is a puncture position with which a number of columns in which two or more 1s are contained in a region of the check matrix that is directly affected by puncturing is minimized.

An encoding method and encoder of a time-varying LDPC-CC with high error correction performance are provided. In an encoding method of performing low density parity check convolutional coding (LDPC-CC) of a time varying period of q using a parity check polynomial of a coding rate of (n1)/n (where n is an integer equal to or greater than 2), the time varying period of q is a prime number greater than 3, the method receiving an information sequence as input and encoding the information sequence using Equation 1 as a g-th (g=0, 1, . . . , q1) parity check polynomial to satisfy 0.