Patent classifications
H03M13/1171
Non-binary decoding using tensor product transforms
A method and data storage system receives a confidence vector for a non-binary symbol value read from a memory cell of a non-volatile memory device, where the confidence vector includes a first plurality of confidence values and transforms the first plurality of confidence values into a first plurality of likelihood values using a forward tensor-product transform. A respective binary message passing decoding operation is performed with each of the first plurality of likelihood values to generate a second plurality of likelihood values, and the second plurality of likelihood values are transformed into a second plurality of confidence values of the confidence vector using a reverse tensor-product transform.
Low density parity check coded modulation for optical communications
Systems and methods for data transport in optical communications systems, including a transmitter for encoding a received information sequence by constructing an outer and inner quasi cyclic-low-density parity check (QC-LDPC) code. The encoding includes dividing the received information sequence into a plurality of messages of equal length, encoding each of the messages into a codeword to generate a plurality of outer codewords, cascading the plurality of outer codewords to generate a bit sequence, and executing inner encoding to encode each of the plurality of outer codewords into codewords in QC-LDPC inner code. A receiver decodes a received data stream based on the QC-LDPC inner code using two-phase decoding including iteratively performing at least one of inner/outer and outer/inner decoding until a threshold condition is reached.
Irregular low density parity check processing system with non-uniform scaling
An apparatus for decoding data includes a data decoding circuit configured to decode data encoded with an irregular low density parity check code based on a parity check matrix with non-uniform column weights, and at least one scaling circuit configured to scale values in the data decoding circuit with a scaling value that is dependent at least in part on a column weight of the likelihood values being scaled.
Decoding of non-binary LDPC codes
A method is proposed for managing a parity-check node calculation unit of an error-correcting code decoder having a representation as a bipartite graph comprising at least one parity-check node, the parity-check node being configured to receive first and second input messages, and to produce an output message, the elements of the input and output messages of the parity-check node comprising a symbol and a measure of reliability associated with the symbol, the first and second input messages containing lists of elements ordered by their measure of reliability. The method comprises: initializing a plurality of n.sub.bub FIFO memories with elements calculated from combinations of elements of the first and second input messages, and iteratively determining the values of the output message.
Decoding apparatus and method in mobile communication system using non-binary low-density parity-check code
A decoding method in a mobile communication system using a non-binary LDPC code according to various embodiments of the present disclosure includes: selecting a message value having the highest reliability from each column and each row of an input vector message; generating a configuration set using the message value selected for each column and a GF element corresponding to the message value; and generating a check node output message using the generated configuration set and an extra output message value. According to various embodiments of the present disclosure, a decoding time period is reduced.
OAM based physical layer security using hybrid free-space optical-terahertz technology
Aspects of the present disclosure describe systems, methods, and structures for physical layer security using hybrid free-space optical and terahertz transmission technologies that advantageously overcome atmospheric characteristics that infirmed the prior art.
Reduced complexity non-binary LDPC decoding algorithm
Decoding logic is provided that is operational upon a data buffer to represent a plurality of variable nodes and a plurality of check nodes. For a respective one of the variable nodes, a vector component is selected from a confidence vector associated with the variable node. Using a respective one of the check nodes, a check node return value is calculated based on one or more other vector components from one or more other vectors and one or more vector indices corresponding to the one or more other vector components. The confidence vector is then updated based on the check node return value and an index for the check node return value, and a current state of a memory cell associated with the respective one of the variable nodes is determined based on a location of a primary one of multiple vector components within the updated confidence vector.
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
The present technology relates to a data processing device and a data processing method which can ensure high communication quality in data transmission using LDPC codes.
In group-wise interleaving, an LDPC code having a code length N of 64800 bits and a coding rate r of 13/15 is interleaved in a unit of a bit group of 360 bits. In group-wise deinterleaving, a sequence of bit groups of the LDPC code which has been subjected to the group-wise interleaving is returned to an original sequence. The present technology can be applied to, for example, a case in which data transmission is performed using LDPC codes.
Physical layer security in optical communications using Bessel modes
Aspects of the present disclosure describe physical layer security in optical communications wherein Bessel modes are employed and significantly outperform conventional schemes with respect to secrecy and advantageously benefit from atmospheric turbulence effects with beam splitting attacks.
MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY
According to one embodiment, a memory system comprises an encoder that encodes by a graph code and a data holding unit that holds data to be used in encoding. A check matrix of the graph code includes first to sixth submatrices, and the encoder produces a first vector obtained by multiplying an information word and the first submatrix, produces a second vector obtained by multiplying the information word and the third submatrix, produces a third vector obtained by multiplying the first vector and the fifth submatrix inverted in sign, produces a fourth vector obtained by adding the third vector and the second vector, produces a first parity obtained by multiplying the fourth vector and the data, produces a fifth vector obtained by multiplying the first parity and the second submatrix inverted in sign, and produces a second parity obtained by adding the fifth vector and the first vector.