Codewords of an error correcting code can be received. The codewords can be separated into multiple segments. The segments of the codewords can be distributed in an error correcting layout across a plurality of dies where at least a portion of the error correcting (EC) layout constitutes a first layout in the form of a Latin Square.

An encoding method, an encoder, and a decoder for dynamic power consumption control are provided. The encoder includes a control unit, an initial encoding unit, and L incremental encoding units. The control unit is configured to enable only the initial encoding unit in an RS (N.sub.0, K) operating mode to perform encoding or enable only the initial encoding unit and first j incremental encoding units in the L incremental encoding units in an RS (N.sub.j, K) operating mode to perform encoding. The initial encoding unit is configured to perform RS FEC encoding on m(x) to obtain a quotient D.sub.0(x) and a remainder R.sub.0(x) of x.sup.N.sub.0.sup.Km(x) relative to g.sub.0(x). An (h+1).sup.th incremental encoding unit is configured to obtain, according to a quotient D.sub.h(x) and a remainder R.sub.h(x), a quotient D.sub.h+1(x) and a remainder R.sub.h+1(x) of x.sup.N.sub.h+1.sup.Km(x) relative to g.sub.h+1(x).

A method for decoding a cyclic code is disclosed. The method includes: determining a plurality of syndromes for the cyclic code; determining, by a hardware processor, a first coefficient and a second coefficient based on the plurality of syndromes; determining, by the hardware processor, a third coefficient based on the second coefficient; and generating an error-locator polynomial based on the first coefficient, the second coefficient, and the third coefficient.

A construction method for a (n,n(n1),n1) permutation group code based on coset partition is provided. The presented (n,n(n1),n1) permutation group code has an error-correcting capability of d1 and features a strong anti-interference capability for channel interferences comprising multi-frequency interferences and signal fading. As n is a prime, for a permutation code family with a minimum distance of n1 and a code set size of n(n1), the invention provides a method of calculating n1 orbit leader permutation codewords by O.sub.n={o.sub.1}.sub.=1.sup.n-1(mod n) and enumerating residual codewords of the code set by P.sub.n=C.sub.nO.sub.n={(l.sub.1).sup.n-1O.sub.n}={(r.sub.n).sup.n-1O.sub.n}. Besides, a generator of the code set thereof is provided. The (n,n(n1),n1) permutation group code of the invention is an algebraic-structured code, n1 codewords of the orbit leader array can be obtained simply by adder and (mod n) calculator rather than multiplication of positive integers. Composition operations of the cyclic subgroup C.sub.n acting on all permutations o.sub. of the orbit leader permutation array O.sub.n are replaced by well-defined cyclic shift composite operation functions (l.sub.1).sup.n-1 and (r.sub.n).sup.n-1 so that the action of the cyclic group acting on permutations is realized by a group of cyclic shift registers.

The present disclosure relates to methods and systems for decoding a Bose-Chaudhuri-Hocquenghem (BCH) encoded codeword. The methods-may include receiving a codeword over a data channel; determining a plurality of syndrome values for the codeword during a first time interval; determining a set of initial elements during the first time interval; generating an error locator polynomial based on the plurality of syndrome values, the error locator polynomial representing one or more errors in the codeword; evaluating, based on the set of initial elements, the error locator polynomial to identify one or more error locations corresponding to the one or more errors in the codeword; and correcting the codeword based on the one or more error locations.

A method for decoding a (n, k, d) cyclic code is disclosed. The method includes: receiving a word corresponding to the cyclic code; constructing a look-up table, wherein the look-up table includes k syndrome vectors and k error patterns; computing a syndrome vector of the received word by a hardware processor; comparing the weight of the syndrome vector of the received word with an error-correcting capacity; decoding the received word by adding the received word and the syndrome vector if the weight of the syndrome vector of the received word is not more than the error-correcting capacity; decoding the received word by inverting bits in the message section in sequence and re-compute a syndrome vector of the inverted received word if the weight of the syndrome vector of the received word is more than the error-correcting capacity.

Codewords of an error correcting code can be received. The codewords can be separated into multiple segments. The segments of the codewords can be distributed in an error correcting layout across a plurality of dies where at least a portion of the error correcting layout constitutes a Latin Square (LS) layout.

A method and associated apparatus is disclosed for processing data by means of an error code, wherein the error code has an H-matrix with n columns and m rows, wherein the columns of the H-matrix are different, wherein component-by-component XOR sums of adjacent columns of the H-matrix are different from one another and from all columns of the H-matrix and wherein component-by-component XOR sums of nonadjacent columns of the H-matrix are different from all columns of the H-matrix and from all component-by-component XOR sums of adjacent columns of the H-matrix.

A circuit arrangement for determining a correction signal on the basis of at least one bit error of a binary word is specified, including a plurality of subcircuits (ST), wherein a respective subcircuit is provided for a bit position to be corrected of the binary word, wherein each of the subcircuits provides at least two locator polynomial values, and comprising a selection unit, which determines a correction signal depending on the locator polynomial values and depending on an error signal (err, E). A method for driving such a circuit arrangement is furthermore proposed.

The present disclosure relates to methods and systems for decoding a Bose-Chaudhuri-Hocquenghem (BCH) encoded codeword. The methods may include receiving a codeword over a data channel; determining a plurality of syndrome values for the codeword during a first time interval; determining a set of initial elements during the first time interval; generating an error locator polynomial based on the plurality of syndrome values, the error locator polynomial representing one or more errors in the codeword; evaluating, based on the set of initial elements, the error locator polynomial to identify one or more error locations corresponding to the one or more errors in the codeword; and correcting the codeword based on the one or more error locations.