A decoding method includes that when encoding at a sending terminal, for a m-order primitive polynomial P(x), a primitive field element in galois field GF(2.sup.m) is represented by ; a lookup table f(.sup.j) for different power exponents of is established, where the value of j is selected from all the integers ranging from 0 to 2m1, with a total number of 2m; a generator polynomial G(x) is expanded to obtain a polynomial with respect to x, with coefficients being an addition or subtraction of the power exponents of ; a remainder polynomial R(x), obtained by dividing code word polynomial Q(x) by the generator polynomial G(x), is a polynomial with respect to x, with coefficients being an addition or subtraction of the power exponents of ; and the coefficients of the generator polynomial G(x) and the remainder polynomial R(x) are both calculated using data found in the lookup table f(.sup.j).

A system comprises a forward error correction decoder comprising syndrome computation circuitry, key-equation solver circuitry, and search and evaluator circuitry. The syndrome computation circuitry may comprise a plurality of syndrome compute units connected in parallel. The syndrome computation circuitry may be dynamically configurable to vary a quantity of the syndrome compute units used for processing of a codeword based on conditions of a channel over which the codeword was received. The syndrome computation circuitry may be operable to use a first quantity of the syndrome compute units for processing of a first codeword received over the channel when the channel is characterized by a first bit error rate and a second quantity of the syndrome compute units for processing of a second codeword received over the channel when the channel is characterized by a second bit error rate.

A Reed-Solomon decoder circuit includes: a syndrome calculator circuit to compute syndrome values for a first codeword and a second codeword sequentially supplied to the syndrome calculator circuit, where last symbols of the first codeword overlap with first symbols of the second codeword during an overlap clock cycle between: a first plurality of non-overlap clock cycles during which the first codeword is supplied to the syndrome calculator circuit; and a second plurality of non-overlap clock cycles during which the second codeword is supplied to the syndrome calculator circuit; an error locator and error evaluator polynomial calculator circuit; an error location and error value calculator circuit; an error counter; and an error corrector circuit to correct the errors in the first codeword and the second codeword based on error counts and the error magnitudes computed by an error evaluator circuit.

An encoding method, an encoder, and a decoder for dynamic power consumption control are provided. The encoder includes a control unit, an initial encoding unit, and L incremental encoding units. The control unit is configured to enable only the initial encoding unit in an RS (N.sub.0, K) operating mode to perform encoding or enable only the initial encoding unit and first j incremental encoding units in the L incremental encoding units in an RS (N.sub.j, K) operating mode to perform encoding. The initial encoding unit is configured to perform RS FEC encoding on m(x) to obtain a quotient D.sub.0(x) and a remainder R.sub.0(x) of x.sup.N.sub.0.sup.Km(x) relative to g.sub.0(x). An (h+1).sup.th incremental encoding unit is configured to obtain, according to a quotient D.sub.h(x) and a remainder R.sub.h(x), a quotient D.sub.h+1(x) and a remainder R.sub.h+1(x) of x.sup.N.sub.h+1.sup.Km(x) relative to g.sub.h+1(x).

A method for operating a semiconductor memory device may include applying a program pulse for programming data of a first page included in the semiconductor memory device. The method may include determining whether the number of times of applying the program pulse has exceeded a first critical value. The method may include performing an error bit check on a second page coupled to the same word line as the first page, based on the determined result of whether the first critical value has been exceeded.

An error correcting method is provided, which includes the following steps. An error value is obtained. The error value is substituted into an error correcting function, so that the error correcting function causes the error value to converge to 0 in a finite time. The error correcting function conforms to a non-Lipschitzian characteristic. An embodiment of the disclosure solves the problem in traditional system stability analysis through a differential equation, adjusts parameters to determine a convergence time, and ensures that a convergence target fully conforms to an expected value and that a unique solution of the error value is 0.

An information storage system in which information is digitally encoded as a sequence of numbers or symbols periodically errors or adds erasures to some of these numbers or symbols. When the accumulated total number of errors or erasures exceeds a certain level, the information becomes irretrievable. Parity check symbols may be calculated and appended to the sequence of numbers or symbols so that the errors or erasures may be corrected and the information retrieved. At some point, the error correction system is overwhelmed, and the information cannot be retrieved. A public record of the positions of the errors or erasures may be maintained using a block chain or other publication to authenticate the progress of the encoded information towards the point where the contained information has been destroyed. The encoded information may be scrambled or encrypted to provide a clear threshold as to when the encoded information is irretrievably lost.

A decoding method includes that when encoding at a sending terminal, for a m-order primitive polynomial P(x), a primitive field element in galois field GF(2.sup.m) is represented by ?; a lookup table f(?.sup.j) for different power exponents of ? is established, where the value of j is selected from all the integers ranging from 0 to 2m?1, with a total number of 2m; a generator polynomial G(x) is expanded to obtain a polynomial with respect to x, with coefficients being an addition or subtraction of the power exponents of ?; a remainder polynomial R(x), obtained by dividing code word polynomial Q(x) by the generator polynomial G(x), is a polynomial with respect to x, with coefficients being an addition or subtraction of the power exponents of ?; and the coefficients of the generator polynomial G(x) and the remainder polynomial R(x) are both calculated using data found in the lookup table f(?.sup.j).

An error correcting method is provided, which includes the following steps. An error value is obtained. The error value is substituted into an error correcting function, so that the error correcting function causes the error value to converge to 0 in a finite time. The error correcting function conforms to a non-Lipschitzian characteristic. An embodiment of the disclosure solves the problem in traditional system stability analysis through a differential equation, adjusts parameters to detei nine a convergence time, and ensures that a convergence target fully conforms to an expected value and that a unique solution of the error value is 0.

Provided is an error correcting method including: executing, by an error-position detector, a determination process if a received word fails to satisfy a predetermined condition, the received word having a plurality of symbols, the determination process including determining if a determination-target symbol has an error or not, and detecting an error position, the error position being a position of the symbol having an error; changing, by a determination-target changing unit, the position of the determination-target symbol of the received word every time the determination process is executed; detecting, by an undetected-position detector, if the predetermined condition is satisfied, the error position of the symbol, for which the determination process is not executed, based on a relation between the error position and a variable generated from the received word; and correcting, by an error corrector, an error at the error position detected by the error-position detector and the undetected-position detector.