An equalizer circuit of a particular equalization stage of a equalizer circuit is omitted, and input signals that would have otherwise been received at the omitted equalization circuit bypass the equalization stage and are instead processed at an equalizer circuit included at the next stage. Thus, a subset of the received frequency-domain signals can be processed by equalizer circuits at a first stage, while the remaining received frequency-domain signals bypass the first stage and are processed at an equalizer circuit included at a second stage.

A joint user detection apparatus for a wireless communication system, such as OFDM systems, arranged to account for timing impairments experienced by CAZAC codes. The proposed apparatus brings improvements over conventional receiving apparatuses by allowing joint user channel estimation processing and joint user equalization processing while considering timing impairments of user associated information present within a symbol of a received signal. The proposed solution could be used on conventional receiving apparatuses since both joint user channel estimation processing and joint user equalization processing can be activated independently such that either one or both improvements may be activated as needed or as required by the design of the conventional receiving apparatuses. A method and a computer program are also claimed.

Apparatuses, systems, and techniques to perform signal processing operations in a fifth generation (5G) radio signal. In at least one embodiment, one or more processors equalize, in parallel, one or more 5G radio signals.

Various example embodiments may relate to relate radio receivers. A radio receiver may receive data and reference signals; determine a channel estimate for the received data based on the reference signals; and equalize the received data with a sequential plurality of equalization stages, one or more of the sequential plurality of equalization stages comprising: an equalizer configured to determine an equalized representation of input data based a previous channel estimate, and a channel estimator neural network configured to determine at least a refined channel estimate for a subsequent equalization stage based on the previous channel estimate and the input data.

Apparatuses, methods, and systems are disclosed for data block transmissions. One method includes transmitting a data blocks frequency multiplexed in a time duration to a device, wherein: the data blocks are transmitted based on spatial information and a redundancy version sequence; each data block of the data blocks carries the same data varied based on a redundancy version indicated by the redundancy version sequence and occupies a same number of virtual resource blocks in a frequency domain; the data blocks are scheduled by a control channel, wherein the control channel is used to transmit information that indicates the redundancy version sequence of redundancy version sequences configured by high layer signaling; the spatial information is indicated in the control channel or is configured by high layer signaling; and a total number of data blocks of the data blocks is configured by high layer signaling.

Apparatuses, systems, and techniques to perform signal processing operations in a fifth generation (5G) radio signal. In at least one embodiment, one or more processors equalize, in parallel, one or more 5G radio signals.

An equalization signal processing circuit includes: a signal division unit that divides an input signal of oversampling of a rational number M/L multiple into M signals; a first frequency domain filter that performs an arithmetic operation of a first filter coefficient on M signals in a frequency domain; a second frequency domain filter that performs an arithmetic operation of a second filter coefficient on, for each L group, M signals on which the arithmetic operation of the first filter coefficient is performed; a time domain conversion unit that converts a signal added for each group into a signal in a time domain; a switch circuit that sequentially selects a signal converted into a signal in the time domain for each group; and a coefficient updating unit that updates the first filter coefficient and the second filter coefficient.

Technologies for providing passive equalization with front-end level shifter (FELS) are described. One receiver device includes an input terminal, an analog signal processing circuit; and a front-end equalizer circuit coupled between the input terminal and the analog signal processing circuit. The front-end equalizer circuit includes a programmable common mode feedback (CMFB) circuit and a passive resistor-inductor-capacitor (RLC) network. The programmable CMFB circuit can receive, from the input terminal, an incoming agnostic common-mode (CM) signal having a first voltage level and a differential peak-to-peak voltage in at least one of an alternating current coupled mode (AC-coupled mode) or a direct current-coupled mode (DC-coupled mode). The programmable CMFB circuit can level shift the incoming agnostic CM signal to a CM signal having a second voltage level using an adjustable current source, the second voltage level corresponding to the analog signal processing circuit.